summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorCliff Click <cliffc@acm.org>2025-03-23 11:26:16 -0700
committerCliff Click <cliffc@acm.org>2025-03-23 11:26:16 -0700
commit0afb4876e602faa75319bb1faf9adc7f6f7476c2 (patch)
tree2f6477bd91e78fa58f6d92e5a67eeecd13d35917
parent3e17e811c4429cda194ccdb892ddb2bd10fa71ea (diff)
downloadSimple-0afb4876e602faa75319bb1faf9adc7f6f7476c2.tar.gz
Simple-0afb4876e602faa75319bb1faf9adc7f6f7476c2.zip
Correct golden spill counts
Encoding: bad test cutout required JMP AddIRISC bad edges during spill.
-rw-r--r--chapter21/src/main/java/com/seaofnodes/simple/codegen/Encoding.java2
-rw-r--r--chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AddIRISC.java12
-rw-r--r--chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/MemOpRISC.java17
-rw-r--r--chapter21/src/test/java/com/seaofnodes/simple/BrainFuckTest.java6
-rw-r--r--chapter21/src/test/java/com/seaofnodes/simple/Chapter21Test.java10
-rw-r--r--chapter21/src/test/java/com/seaofnodes/simple/MergeSortTest.java6
6 files changed, 25 insertions, 28 deletions
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/codegen/Encoding.java b/chapter21/src/main/java/com/seaofnodes/simple/codegen/Encoding.java
index 0162bc84..756735ad 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/codegen/Encoding.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/codegen/Encoding.java
@@ -185,7 +185,7 @@ public class Encoding {
CFGNode next = bb instanceof ReturnNode ? (CFGNode)bb.out(bb.nOuts()-1) : bb.uctrl();
// If the *next* BB has already been visited, we require an
// unconditional backwards jump here
- if( visit.get(next._nid) && !(next instanceof StopNode) && !(bb.in(0) instanceof IfNode )) {
+ if( visit.get(next._nid) && !(next instanceof StopNode) ) {
CFGNode jmp = _code._mach.jump();
jmp.setDefX(0,bb);
next.setDef(next._inputs.find(bb),jmp);
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AddIRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AddIRISC.java
index bdd851ec..fa18d14c 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AddIRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AddIRISC.java
@@ -1,10 +1,7 @@
package com.seaofnodes.simple.node.cpus.riscv;
-import com.seaofnodes.simple.SB;
import com.seaofnodes.simple.Utils;
-import com.seaofnodes.simple.codegen.*;
import com.seaofnodes.simple.node.Node;
-import com.seaofnodes.simple.type.TypeInteger;
public class AddIRISC extends ImmRISC {
// Used to inst-selection as a direct match against an ideal Add/Sub
@@ -13,5 +10,12 @@ public class AddIRISC extends ImmRISC {
@Override public String glabel() { return "+"; }
@Override int opcode() { return riscv.I_TYPE; }
@Override int func3() {return 0;}
- @Override public AddIRISC copy() { return new AddIRISC(this,_imm12,false); }
+ @Override public AddIRISC copy() {
+ // Clone the AddI, using the same inputs-only code used during inst select.
+ // Output edges are missing.
+ AddIRISC add = new AddIRISC(in(1),_imm12,false);
+ // Copys happen when output edges should be valid, so correct missing output edges.
+ in(1)._outputs.add(add);
+ return add;
+ }
}
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/MemOpRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/MemOpRISC.java
index 1e19dfd4..ffa173ef 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/MemOpRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/MemOpRISC.java
@@ -48,18 +48,11 @@ public abstract class MemOpRISC extends MemOpNode implements MachNode {
// 7 bits, 00 000 11 or 00 001 11 for FP
int opcode(Encoding enc) {
- if(enc.reg(this) < riscv.F_OFFSET) return 3;
- else {
- if(this instanceof LoadRISC) {
- // opcode is same for 32 bit and 64 bits
- return 7;
- }
- if(this instanceof StoreRISC) {
- // opcode is the same for 32 bit and 64 bits
- return 39;
- }
- }
- return enc.reg(this ) < riscv.F_OFFSET ? 3 : 7;
+ if( enc.reg(this) < riscv.F_OFFSET ) return 3;
+ else if( this instanceof StoreRISC )
+ // opcode is the same for 32 bit and 64 bits
+ return 39;
+ return 7;
}
short xreg(Encoding enc) {
short xreg = enc.reg(this );
diff --git a/chapter21/src/test/java/com/seaofnodes/simple/BrainFuckTest.java b/chapter21/src/test/java/com/seaofnodes/simple/BrainFuckTest.java
index 856baac4..28111697 100644
--- a/chapter21/src/test/java/com/seaofnodes/simple/BrainFuckTest.java
+++ b/chapter21/src/test/java/com/seaofnodes/simple/BrainFuckTest.java
@@ -63,9 +63,9 @@ for( int pc = 0; pc < program#; pc++ ) {
}
return output;
""";
- Chapter21Test.testCPU(src,"x86_64_v2", "SystemV",28,null);
- Chapter21Test.testCPU(src,"riscv" , "SystemV",12,null);
- Chapter21Test.testCPU(src,"arm" , "SystemV",12,null);
+ Chapter21Test.testCPU(src,"x86_64_v2", "SystemV",40,null);
+ Chapter21Test.testCPU(src,"riscv" , "SystemV",30,null);
+ Chapter21Test.testCPU(src,"arm" , "SystemV",30,null);
//assertEquals("Hello World!\n", Eval2.eval(code, 0, 10000));
}
}
diff --git a/chapter21/src/test/java/com/seaofnodes/simple/Chapter21Test.java b/chapter21/src/test/java/com/seaofnodes/simple/Chapter21Test.java
index 9d780b57..cb55c033 100644
--- a/chapter21/src/test/java/com/seaofnodes/simple/Chapter21Test.java
+++ b/chapter21/src/test/java/com/seaofnodes/simple/Chapter21Test.java
@@ -57,16 +57,16 @@ public class Chapter21Test {
public void testString() throws IOException {
String src = Files.readString(Path.of("src/test/java/com/seaofnodes/simple/progs/stringHash.smp"));
testCPU(src,"x86_64_v2", "SystemV",18,null);
- testCPU(src,"riscv" , "SystemV", 3,null);
- testCPU(src,"arm" , "SystemV", 3,null);
+ testCPU(src,"riscv" , "SystemV",18,null);
+ testCPU(src,"arm" , "SystemV",17,null);
}
@Test
public void testArray1() throws IOException {
String src = Files.readString(Path.of("src/test/java/com/seaofnodes/simple/progs/array1.smp"));
- testCPU(src,"x86_64_v2", "SystemV",3,"return .[];");
- testCPU(src,"riscv" , "SystemV",1,"return (add,.[],(mul,.[],1000));");
- testCPU(src,"arm" , "SystemV",1,"return (add,.[],(mul,.[],1000));");
+ testCPU(src,"x86_64_v2", "SystemV",7,"return .[];");
+ testCPU(src,"riscv" , "SystemV",9,"return (add,.[],(mul,.[],1000));");
+ testCPU(src,"arm" , "SystemV",5,"return (add,.[],(mul,.[],1000));");
}
diff --git a/chapter21/src/test/java/com/seaofnodes/simple/MergeSortTest.java b/chapter21/src/test/java/com/seaofnodes/simple/MergeSortTest.java
index c83fe089..bf775b4f 100644
--- a/chapter21/src/test/java/com/seaofnodes/simple/MergeSortTest.java
+++ b/chapter21/src/test/java/com/seaofnodes/simple/MergeSortTest.java
@@ -58,9 +58,9 @@ merge_sort(a, b, a#);
return a;
""";
- Chapter20Test.testCPU(src,"x86_64_v2", "SystemV",46,"Stop[ return mov(mov([int])); return 0; ]");
- Chapter20Test.testCPU(src,"riscv" , "SystemV",36,"Stop[ return mov(mov([int])); return 0; ]");
- Chapter20Test.testCPU(src,"arm" , "SystemV",37,"Stop[ return mov(mov([int])); return 0; ]");
+ Chapter20Test.testCPU(src,"x86_64_v2", "SystemV",54,"Stop[ return mov(mov([int])); return 0; ]");
+ Chapter20Test.testCPU(src,"riscv" , "SystemV",44,"Stop[ return mov(mov([int])); return 0; ]");
+ Chapter20Test.testCPU(src,"arm" , "SystemV",44,"Stop[ return mov(mov([int])); return 0; ]");
//assertEquals("int[ 1,2,3,4,5,6,7,8,9,10,11]", Eval2.eval(code, 11));
}