negate

on x86,risc,arm

11 files changed, 427 insertions, 93 deletions

diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/arm/NegARM.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/arm/NegARM.java
new file mode 100644
index 00000000..74289797
--- /dev/null
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/arm/NegARM.java
@@ -0,0 +1,25 @@
+package com.seaofnodes.simple.node.cpus.arm;
+
+import com.seaofnodes.simple.*;
+import com.seaofnodes.simple.codegen.*;
+import com.seaofnodes.simple.node.*;
+import com.seaofnodes.simple.node.MachConcreteNode;
+import com.seaofnodes.simple.type.TypeInteger;
+
+public class NegARM extends MachConcreteNode implements MachNode {
+    NegARM(Node sub) {
+        super(sub);
+        //_inputs.pop();
+    }
+    @Override public String op() { return "neg"; }
+    @Override public RegMask regmap(int i) { return arm.RMASK; }
+    @Override public RegMask outregmap()   { return arm.RMASK; }
+    @Override public void encoding( Encoding enc ) {
+        // reverse subtract with immediate 0
+        arm.imm_inst(enc,this, in(1), 0b00100110, 0);
+    }
+    // General form: "subi  rd = rs1 - imm"
+    @Override public void asm(CodeGen code, SB sb) {
+        sb.p(code.reg(this)).p(" = -").p(code.reg(in(1)));
+    }
+}
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/arm/arm.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/arm/arm.java
index 97c0cf15..ac134ab4 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/arm/arm.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/arm/arm.java
@@ -630,6 +630,7 @@ public class arm extends Machine {
         case IfNode iff     -> jmp(iff);
         case LoadNode ld    -> ld(ld);
         case MemMergeNode mem -> new MemMergeNode(mem);
+        case MinusNode neg  -> new NegARM(neg);
         case MulFNode mulf  -> new MulFARM(mulf);
         case MulNode mul    -> new MulARM(mul);
         case NewNode nnn    -> new NewARM(nnn);
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/ImmRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/ImmRISC.java
index 84d714e7..9303e566 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/ImmRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/ImmRISC.java
@@ -11,7 +11,7 @@ abstract public class ImmRISC extends MachConcreteNode implements MachNode {
     ImmRISC( Node add, int imm12, boolean pop ) {
         super(add);
         _imm12 = imm12;
-        // If pop, we are moving from a ideal Node to MachNode; the ideal Node
+        // If pop, we are moving from an ideal Node to MachNode; the ideal Node
         // inputs got copied here, but we are absorbing the immediate into the
         // MachNode and so do not want the constant input.
         if( pop ) _inputs.pop();
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/NegRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/NegRISC.java
new file mode 100644
index 00000000..77f4a497
--- /dev/null
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/NegRISC.java
@@ -0,0 +1,20 @@
+package com.seaofnodes.simple.node.cpus.riscv;
+
+import com.seaofnodes.simple.SB;
+import com.seaofnodes.simple.codegen.*;
+import com.seaofnodes.simple.node.*;
+
+public class NegRISC extends MachConcreteNode implements MachNode {
+    public NegRISC( Node neg ) { super(neg); }
+    @Override public String op() { return "neg"; }
+    @Override public RegMask regmap(int i) { assert i==1; return riscv.RMASK; }
+    @Override public RegMask outregmap() { return riscv.WMASK; }
+    @Override public void encoding( Encoding enc ) {
+        short dst = enc.reg(this );
+        short src = enc.reg(in(1));
+        riscv.r_type(riscv.OP,dst,0,0,src,0x20);
+    }
+    @Override public void asm(CodeGen code, SB sb) {
+        sb.p(code.reg(this)).p(" = -").p(code.reg(in(1)));
+    }
+}
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/NotRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/NotRISC.java
index 2a53559f..9cbd5025 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/NotRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/NotRISC.java
@@ -2,15 +2,19 @@ package com.seaofnodes.simple.node.cpus.riscv;
 
 import com.seaofnodes.simple.SB;
 import com.seaofnodes.simple.codegen.*;
+import com.seaofnodes.simple.node.MachConcreteNode;
+import com.seaofnodes.simple.node.MachNode;
 import com.seaofnodes.simple.node.NotNode;
 
-public class NotRISC extends ImmRISC {
-    NotRISC(NotNode not) { super(not,1); }
-    @Override public RegMask regmap(int i) { return riscv.RMASK; }
-    @Override public RegMask outregmap() { return riscv.RMASK;  }
+public class NotRISC extends MachConcreteNode implements MachNode {
+    public NotRISC(NotNode not) { super(not); }
     @Override public String op() { return "not"; }
-    // sltiu: x <u 1 ? 1 : 0;  only zero is unsigned-less-than 1
-    @Override int opcode() { return riscv.OP_IMM; }
-    @Override int func3() { return 2; }
+    @Override public RegMask regmap(int i) { return riscv.RMASK; }
+    @Override public RegMask outregmap()   { return riscv.WMASK; }
+    @Override public void encoding( Encoding enc ) {
+        short dst = enc.reg(this );
+        short src = enc.reg(in(1));
+        enc.add4(riscv.i_type(riscv.OP_IMM, dst, 2, src, 1));
+    }
     @Override public void asm(CodeGen code, SB sb) { sb.p(code.reg(this)); }
 }
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/riscv.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/riscv.java
index e526252e..c86b30f6 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/riscv.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/riscv.java
@@ -356,41 +356,42 @@ public class riscv extends Machine {
 
     @Override public Node instSelect( Node n ) {
         return switch (n) {
-        case AddFNode addf -> addf(addf);
-        case AddNode add -> add(add);
-        case AndNode and -> and(and);
-        case BoolNode bool -> cmp(bool);
-        case CallNode call -> call(call);
-        case CastNode cast  -> new CastRISC(cast);
+        case AddFNode    addf -> addf(addf);
+        case AddNode      add -> add(add);
+        case AndNode      and -> and(and);
+        case BoolNode    bool -> cmp(bool);
+        case CallNode    call -> call(call);
+        case CastNode   cast  -> new CastRISC(cast);
         case CallEndNode cend -> new CallEndRISC(cend);
-        case CProjNode c -> new CProjNode(c);
+        case CProjNode      c -> new CProjNode(c);
         case ConstantNode con -> con(con);
-        case DivFNode divf -> new DivFRISC(divf);
-        case DivNode div -> new DivRISC(div);
-        case FunNode fun -> new FunRISC(fun);
-        case IfNode iff -> jmp(iff);
-        case LoadNode ld -> ld(ld);
+        case DivFNode    divf -> new DivFRISC(divf);
+        case DivNode      div -> new DivRISC(div);
+        case FunNode      fun -> new FunRISC(fun);
+        case IfNode       iff -> jmp(iff);
+        case LoadNode      ld -> ld(ld);
         case MemMergeNode mem -> new MemMergeNode(mem);
-        case MulFNode mulf -> new MulFRISC(mulf);
-        case MulNode mul -> new MulRISC(mul);
-        case NewNode nnn -> nnn(nnn);
-        case NotNode not -> new NotRISC(not);
-        case OrNode or -> or(or);
-        case ParmNode parm -> new ParmRISC(parm);
-        case PhiNode phi -> new PhiNode(phi);
-        case ProjNode prj -> prj(prj);
-        case ReadOnlyNode read -> new ReadOnlyNode(read);
-        case ReturnNode ret -> new RetRISC(ret, ret.fun());
-        case SarNode sar -> sra(sar);
-        case ShlNode shl -> sll(shl);
-        case ShrNode shr -> srl(shr);
-        case StartNode start -> new StartNode(start);
-        case StopNode stop -> new StopNode(stop);
-        case StoreNode st -> st(st);
-        case SubFNode subf -> new SubFRISC(subf);
-        case SubNode sub -> sub(sub);
-        case ToFloatNode tfn -> i2f8(tfn);
-        case XorNode xor -> xor(xor);
+        case MinusNode    neg -> new NegRISC(neg);
+        case MulFNode    mulf -> new MulFRISC(mulf);
+        case MulNode      mul -> new MulRISC(mul);
+        case NewNode      nnn -> nnn(nnn);
+        case NotNode      not -> new NotRISC(not);
+        case OrNode        or -> or(or);
+        case ParmNode    parm -> new ParmRISC(parm);
+        case PhiNode      phi -> new PhiNode(phi);
+        case ProjNode     prj -> prj(prj);
+        case ReadOnlyNode read-> new ReadOnlyNode(read);
+        case ReturnNode   ret -> new RetRISC(ret, ret.fun());
+        case SarNode      sar -> sra(sar);
+        case ShlNode      shl -> sll(shl);
+        case ShrNode      shr -> srl(shr);
+        case StartNode  start -> new StartNode(start);
+        case StopNode    stop -> new StopNode(stop);
+        case StoreNode     st -> st(st);
+        case SubFNode    subf -> new SubFRISC(subf);
+        case SubNode      sub -> sub(sub);
+        case ToFloatNode  tfn -> i2f8(tfn);
+        case XorNode      xor -> xor(xor);
 
         case LoopNode loop -> new LoopNode(loop);
         case RegionNode region -> new RegionNode(region);
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/x86_64_v2/NegX86.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/x86_64_v2/NegX86.java
new file mode 100644
index 00000000..b8b83cb0
--- /dev/null
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/x86_64_v2/NegX86.java
@@ -0,0 +1,21 @@
+package com.seaofnodes.simple.node.cpus.x86_64_v2;
+
+import com.seaofnodes.simple.SB;
+import com.seaofnodes.simple.codegen.*;
+import com.seaofnodes.simple.node.*;
+
+public class NegX86 extends MachConcreteNode implements MachNode {
+    NegX86(MinusNode not) { super(not); }
+    @Override public String op() { return "neg"; }
+    @Override public RegMask regmap(int i) { return x86_64_v2.RMASK; }
+    @Override public RegMask outregmap()   { return x86_64_v2.RMASK; }
+    @Override public RegMask killmap()     { return x86_64_v2.FLAGS_MASK; }
+
+    @Override public void encoding( Encoding enc ) {
+        short dst = enc.reg(this );
+        enc.add1(x86_64_v2.rex(0, dst, 0));
+        enc.add1(0xF7); // opcode
+        enc.add1(x86_64_v2.modrm(x86_64_v2.MOD.DIRECT, 3, dst));
+    }
+    @Override public void asm(CodeGen code, SB sb) { sb.p(code.reg(this)); }
+}
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/x86_64_v2/SetX86.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/x86_64_v2/SetX86.java
index 11a0c6e0..b2902086 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/x86_64_v2/SetX86.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/x86_64_v2/SetX86.java
@@ -33,6 +33,7 @@ public class SetX86 extends MachConcreteNode implements MachNode {
             case "==" -> 0x94;  // SETE
             case "<"  -> _unsigned ? 0x92 : 0x9C;  // SETB /SETL
             case "<=" -> _unsigned ? 0x96 : 0x9E;  // SETBE/SETLE
+            case ">=" -> _unsigned ? 0x93 : 0x9D;  // SETAE/SETGE
             default -> throw Utils.TODO();
             });
         enc.add1(x86_64_v2.modrm(x86_64_v2.MOD.DIRECT, 0, dst));
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/x86_64_v2/x86_64_v2.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/x86_64_v2/x86_64_v2.java
index 401a9b2c..53671eae 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/x86_64_v2/x86_64_v2.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/x86_64_v2/x86_64_v2.java
@@ -407,42 +407,43 @@ public class x86_64_v2 extends Machine {
     @Override
     public Node instSelect(Node n) {
         return switch (n) {
-        case AddFNode addf -> addf(addf);
-        case AddNode add -> add(add);
-        case AndNode and -> and(and);
-        case BoolNode bool -> cmp(bool);
-        case CProjNode c -> new CProjNode(c);
+        case AddFNode    addf -> addf(addf);
+        case AddNode      add -> add(add);
+        case AndNode      and -> and(and);
+        case BoolNode    bool -> cmp(bool);
+        case CProjNode      c -> new CProjNode(c);
         case CallEndNode cend -> new CallEndX86(cend);
-        case CallNode call -> call(call);
-        case CastNode cast -> new CastX86(cast);
+        case CallNode    call -> call(call);
+        case CastNode    cast -> new CastX86(cast);
         case ConstantNode con -> con(con);
-        case DivFNode divf -> new DivFX86(divf);
-        case DivNode div -> new DivX86(div);
-        case FunNode fun -> new FunX86(fun);
-        case IfNode iff -> jmp(iff);
-        case LoadNode ld -> ld(ld);
+        case DivFNode    divf -> new DivFX86(divf);
+        case DivNode      div -> new DivX86(div);
+        case FunNode      fun -> new FunX86(fun);
+        case IfNode       iff -> jmp(iff);
+        case LoadNode      ld -> ld(ld);
         case MemMergeNode mem -> new MemMergeNode(mem);
-        case MulFNode mulf -> new MulFX86(mulf);
-        case MulNode mul -> mul(mul);
-        case NewNode nnn -> new NewX86(nnn);
-        case NotNode not -> new NotX86(not);
-        case OrNode or -> or(or);
-        case ParmNode parm -> new ParmX86(parm);
-        case PhiNode phi -> new PhiNode(phi);
-        case ProjNode prj -> prj(prj);
-        case ReadOnlyNode read -> new ReadOnlyNode(read);
-        case ReturnNode ret -> new RetX86(ret, ret.fun());
-        case SarNode sar -> sar(sar);
-        case ShlNode shl -> shl(shl);
-        case ShrNode shr -> shr(shr);
-        case StartNode start -> new StartNode(start);
-        case StopNode stop -> new StopNode(stop);
-        case StoreNode st -> st(st);
-        case SubFNode subf -> new SubFX86(subf);
-        case SubNode sub -> sub(sub);
-        case ToFloatNode tfn -> i2f8(tfn);
-        case XCtrlNode x -> new ConstantNode(Type.XCONTROL);
-        case XorNode xor -> xor(xor);
+        case MinusNode    neg -> new NegX86(neg);
+        case MulFNode    mulf -> new MulFX86(mulf);
+        case MulNode      mul -> mul(mul);
+        case NewNode      nnn -> new NewX86(nnn);
+        case NotNode      not -> new NotX86(not);
+        case OrNode        or -> or(or);
+        case ParmNode    parm -> new ParmX86(parm);
+        case PhiNode      phi -> new PhiNode(phi);
+        case ProjNode     prj -> prj(prj);
+        case ReadOnlyNode read-> new ReadOnlyNode(read);
+        case ReturnNode   ret -> new RetX86(ret, ret.fun());
+        case SarNode      sar -> sar(sar);
+        case ShlNode      shl -> shl(shl);
+        case ShrNode      shr -> shr(shr);
+        case StartNode  start -> new StartNode(start);
+        case StopNode    stop -> new StopNode(stop);
+        case StoreNode     st -> st(st);
+        case SubFNode    subf -> new SubFX86(subf);
+        case SubNode      sub -> sub(sub);
+        case ToFloatNode  tfn -> i2f8(tfn);
+        case XCtrlNode      x -> new ConstantNode(Type.XCONTROL);
+        case XorNode      xor -> xor(xor);
 
         case LoopNode loop -> new LoopNode(loop);
         case RegionNode region -> new RegionNode(region);
diff --git a/chapter21/src/test/java/com/seaofnodes/simple/Chapter21Test.java b/chapter21/src/test/java/com/seaofnodes/simple/Chapter21Test.java
index 259cbb4f..bd3783ed 100644
--- a/chapter21/src/test/java/com/seaofnodes/simple/Chapter21Test.java
+++ b/chapter21/src/test/java/com/seaofnodes/simple/Chapter21Test.java
@@ -12,12 +12,12 @@ import static org.junit.Assert.*;
 
 public class Chapter21Test {
 
-    @Test
+    @Test @Ignore
     public void testJig() throws IOException {
         String src = Files.readString(Path.of("src/test/java/com/seaofnodes/simple/progs/jig.smp"));
-        testCPU(src,"x86_64_v2", "SystemV",1,null);
-        testCPU(src,"riscv"    , "SystemV",1,null);
-        testCPU(src,"arm"      , "SystemV",1,null);
+        testCPU(src,"x86_64_v2", "SystemV",-1,null);
+        testCPU(src,"riscv"    , "SystemV",-1,null);
+        testCPU(src,"arm"      , "SystemV",-1,null);
     }
 
     static void testCPU( String src, String cpu, String os, int spills, String stop ) {
diff --git a/chapter21/src/test/java/com/seaofnodes/simple/progs/jig.smp b/chapter21/src/test/java/com/seaofnodes/simple/progs/jig.smp
index 47aeb2e5..c1c50c03 100644
--- a/chapter21/src/test/java/com/seaofnodes/simple/progs/jig.smp
+++ b/chapter21/src/test/java/com/seaofnodes/simple/progs/jig.smp
@@ -1,17 +1,277 @@
 // -*- mode: java;  -*-
-struct s0 {
-    bool v0;
-    u8 v2;
-    i16 v1;
-    byte v3;
-    int v4;
-    i16 v5;
-    int v6;
-};
-                    while(new s0.v1) {}
-            if(new s0.v6) return new s0.v5;
-                return new s0.v2;
-struct s1 {
-    int v7;
-};
-                while(new s1.v7) arg=new s0.v3;
+while(-----arg) {
+    while(-arg) {
+        while(-----arg*---0) {
+                int N=--false==false<--arg;
+                while(N<-4==N) {
+                    N=N+N;
+                }
+            }
+        {
+            int kzEl_r7EYz=3*----0!=-arg<(37*--97!=0/arg==arg)<=-(--arg!=0);
+            while(kzEl_r7EYz<---1) {
+                kzEl_r7EYz=kzEl_r7EYz+kzEl_r7EYz*arg>=24;
+                if(7) continue;
+                kzEl_r7EYz=false;
+                if(-kzEl_r7EYz+arg<-3) continue;
+                else {
+                    while(kzEl_r7EYz) continue;
+                    arg=----3;
+                    kzEl_r7EYz=-(-----arg*1>-kzEl_r7EYz);
+                    int v2uF_4ba=9;
+                }
+            }
+        }
+        int pjcp7rv=arg;
+        {
+            int m2ya3=--arg-pjcp7rv;
+            while(m2ya3<-----pjcp7rv>=pjcp7rv+--pjcp7rv!=---pjcp7rv!=-arg<---(-m2ya3)>m2ya3<=-----true>14!=--m2ya3) {
+                m2ya3=m2ya3+-(--0<=false<pjcp7rv/arg<=-true);
+                while((--m2ya3)<--arg<-----arg*false!=arg<pjcp7rv*arg) {
+                    pjcp7rv=-3+-arg;
+                    break;
+                }
+                while(-3) {
+                    while(67+0-61) m2ya3=m2ya3;
+                    if(----pjcp7rv==---(---arg)) pjcp7rv=0!=-23;
+                    else pjcp7rv=----89;
+                    while(m2ya3!=m2ya3<pjcp7rv) m2ya3=1;
+                    while(--arg<=pjcp7rv) pjcp7rv=-32<=-m2ya3+62;
+                }
+                break;
+            }
+        }
+        {
+            int arg=-1<-9!=(-arg>=-pjcp7rv>=arg<=arg);
+            while(arg<-arg) {
+                arg=arg+--arg;
+                {
+                    while((--93)--pjcp7rv*-pjcp7rv+arg) arg=0-(6>=(--(---41/(0))!=--pjcp7rv)>=---2*33);
+                    pjcp7rv=11;
+                    int c=pjcp7rv;
+                    if(--107) break;
+                    else break;
+                }
+            }
+        }
+        pjcp7rv=pjcp7rv;
+        int aR0Wkua=-pjcp7rv==pjcp7rv;
+        {
+            if(-0!=-0) while(-true) break;
+            else {
+                while(aR0Wkua) pjcp7rv=-0/pjcp7rv;
+                pjcp7rv=pjcp7rv;
+            }
+        }
+    }
+    if(-arg) {
+        {
+            int Isdlt0fr91=0!=arg;
+            while(Isdlt0fr91<-Isdlt0fr91==-Isdlt0fr91+true) {
+                Isdlt0fr91=Isdlt0fr91+-1!=true;
+                if(-arg) if(--arg<=Isdlt0fr91) Isdlt0fr91=-Isdlt0fr91;
+                int i=---arg<---arg!=--40;
+                {
+                    int jVX43Ln4Dm=-(6)==-Isdlt0fr91/----0;
+                    while(jVX43Ln4Dm<--(3-3)) {
+                        jVX43Ln4Dm=jVX43Ln4Dm+-0<25;
+                        i=24<--(jVX43Ln4Dm);
+                    }
+                }
+                i=(arg!=----false>=7);
+                int Te=5>-arg;
+                break;
+            }
+        }
+        arg=arg!=--true/arg;
+        {
+            int UX=arg;
+            while(UX<-3*arg) {
+                UX=UX+arg/-1;
+                arg=-3--(-UX--47<arg==--arg==arg)/arg--UX>=-arg;
+                if(---12) while(-UX) break;
+                break;
+            }
+        }
+        continue;
+    }
+    if(arg) arg=--0;
+    else if(1) continue;
+    int DtTlhjYq=19==arg;
+    {
+        arg=--DtTlhjYq<=(DtTlhjYq/---DtTlhjYq<=-DtTlhjYq);
+        if(---arg) continue;
+        else {
+                int Zsl=40;
+                while(Zsl<--Zsl--false>((Zsl))==Zsl!=--DtTlhjYq-DtTlhjYq-DtTlhjYq) {
+                    Zsl=Zsl+arg;
+                }
+            }
+        if((arg)) if(-DtTlhjYq) {
+            }
+            else while(((2)==3*arg/DtTlhjYq)<=0==---arg) return false;
+        else {
+                int lwbF=arg>=0;
+                while(lwbF<57) {
+                    lwbF=lwbF+--(-arg+lwbF)>=-2>=arg!=arg;
+                    arg=----0+0;
+                    while(49) break;
+                    if(true) DtTlhjYq=-----arg;
+                    DtTlhjYq=0!=-----(0);
+                }
+            }
+        arg=---arg!=DtTlhjYq/--0;
+        DtTlhjYq=-DtTlhjYq/(--arg<arg);
+        if(32) {
+                int q=-DtTlhjYq;
+                while(q<arg*(0*q)/0) {
+                    q=q+DtTlhjYq;
+                    DtTlhjYq=arg;
+                }
+            }
+        else if(--arg) if(15) break;
+                else arg=0==arg<=-55>DtTlhjYq;
+            else {
+            }
+        DtTlhjYq=-0;
+        {
+            while((0)<-arg) DtTlhjYq=-DtTlhjYq;
+        }
+        if(30/--(arg)>=0) DtTlhjYq=-0>=arg;
+        else {
+            int Y2wcIQJ=--DtTlhjYq*---11;
+            if(arg==arg) {
+                Y2wcIQJ=-----Y2wcIQJ;
+                Y2wcIQJ=Y2wcIQJ<7;
+                if(DtTlhjYq) arg=arg;
+                else break;
+                while(-arg!=-31==(false<=-15>=-DtTlhjYq+--6*-----Y2wcIQJ<=---arg!=-Y2wcIQJ<=---0<-arg*--Y2wcIQJ)) DtTlhjYq=arg!=3;
+            }
+            continue;
+        }
+        arg=DtTlhjYq;
+        arg=--3/(---arg)>=80>=-DtTlhjYq<=DtTlhjYq;
+        arg=51+---(-true)!=arg!=----1==-DtTlhjYq;
+        if(11<=arg) if((arg)+79<32+(-arg)) continue;
+            else if(true==DtTlhjYq) break;
+        break;
+    }
+}
+if(arg!=62==arg) {
+    while(---arg) {
+        {
+            int bhmDacPM=arg/arg;
+            while(bhmDacPM<arg) {
+                bhmDacPM=bhmDacPM+80*((-bhmDacPM)/---bhmDacPM>1)<bhmDacPM-2!=7;
+                arg=-0;
+                arg=bhmDacPM>=-arg+-arg;
+                break;
+            }
+        }
+        int arg=true;
+        arg=arg<=arg;
+        {
+            int KlC=30;
+            while(KlC<-2) {
+                KlC=KlC+-1!=25<=-KlC>KlC>----0;
+                int Ij=arg>=-arg<=---10;
+                {
+                    int LAbgurVa2R=-arg!=Ij;
+                    while(LAbgurVa2R<-true) {
+                        LAbgurVa2R=LAbgurVa2R+Ij;
+                        KlC=-LAbgurVa2R;
+                        Ij=42*(-Ij>true);
+                        while(Ij) arg=KlC;
+                        KlC=-----7>-(--KlC<--7)==-LAbgurVa2R;
+                    }
+                }
+                int a=Ij<=-KlC;
+                if(Ij) {
+                    int r1W=a!=-false;
+                }
+                else {
+                    arg=56>=Ij;
+                    while(54) break;
+                    arg=8>=-(a<--Ij)/a>=-a-KlC;
+                }
+                int Yt_T=KlC;
+                arg=KlC;
+            }
+        }
+        if(----false/--arg/12+-----0) if(-9+-arg) while(arg!=(arg)) arg=--1>=-71-arg!=---(--arg*11+102)/--arg;
+            else if(----arg) continue;
+        if(-arg-arg) {
+            arg=-(-arg)*--(-3)<(-7==-arg----arg);
+            {
+                int arg=arg;
+                while(arg<-0>arg==-arg-(-arg>1+11)) {
+                    arg=arg+6-arg!=--0>---30>=---arg<=arg/(3)+---arg;
+                }
+            }
+            arg=-arg+arg;
+            arg=--47+-arg<1>arg*(-arg==-arg--0>3);
+            arg=(----arg)!=arg+--59;
+            arg=--4+arg==-(arg)-arg;
+        }
+        else {
+            while(--true-----true*-25+-18>arg>=-----(-arg)---13) {
+                arg=-0+--true<false;
+                continue;
+            }
+            arg=true<=arg;
+            break;
+        }
+        arg=arg*22<--(0+-arg);
+        {
+            continue;
+        }
+    }
+    arg=1*---((3<=true)==---2);
+    arg=7+-(-1);
+    return arg+--true;
+}
+else {
+    int o3ypEsewxM=-(---arg);
+    int vzXB=(-(---11<=--o3ypEsewxM>=--0))<=-0/-arg;
+    int L=-arg;
+    int B4mHcrf=---vzXB;
+    int oZWGdzZl=-o3ypEsewxM;
+    int K6tQqa1=11;
+    while(0!=--L) {
+            int sdZfTM=vzXB*true+K6tQqa1;
+            while(sdZfTM<false) {
+                sdZfTM=sdZfTM+arg;
+                sdZfTM=oZWGdzZl;
+                K6tQqa1=-K6tQqa1;
+                arg=---K6tQqa1;
+                while((3+-K6tQqa1)<oZWGdzZl) {
+                    if(-----(-1)) sdZfTM=-false;
+                    {}
+                }
+                K6tQqa1=vzXB!=-(B4mHcrf+-7>false);
+                sdZfTM=vzXB;
+            }
+        }
+    L=false;
+    while(31) B4mHcrf=arg;
+    oZWGdzZl=-0<--oZWGdzZl<=--2;
+    if(K6tQqa1>=20<=46) {
+        if(-1+-L) if(oZWGdzZl) {
+                int wmhv=-----0;
+            }
+        int arg=0;
+        o3ypEsewxM=---(oZWGdzZl);
+        return -oZWGdzZl/0;
+    }
+    else if(arg) {
+            int yKk5=B4mHcrf>=4>K6tQqa1<-B4mHcrf/o3ypEsewxM;
+            return -K6tQqa1;
+        }
+        else {
+            if(---0) {
+                {}
+                {}
+            }
+            return o3ypEsewxM;
+        }
+}