Correct golden spill counts

Encoding: bad test cutout required JMP
AddIRISC bad edges during spill.

3 files changed, 14 insertions, 17 deletions

diff --git a/chapter21/src/main/java/com/seaofnodes/simple/codegen/Encoding.java b/chapter21/src/main/java/com/seaofnodes/simple/codegen/Encoding.java
index 0162bc84..756735ad 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/codegen/Encoding.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/codegen/Encoding.java
@@ -185,7 +185,7 @@ public class Encoding {
             CFGNode next = bb instanceof ReturnNode ? (CFGNode)bb.out(bb.nOuts()-1) : bb.uctrl();
             // If the *next* BB has already been visited, we require an
             // unconditional backwards jump here
-            if( visit.get(next._nid) && !(next instanceof StopNode) && !(bb.in(0) instanceof IfNode )) {
+            if( visit.get(next._nid) && !(next instanceof StopNode) ) {
                 CFGNode jmp = _code._mach.jump();
                 jmp.setDefX(0,bb);
                 next.setDef(next._inputs.find(bb),jmp);
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AddIRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AddIRISC.java
index bdd851ec..fa18d14c 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AddIRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AddIRISC.java
@@ -1,10 +1,7 @@
 package com.seaofnodes.simple.node.cpus.riscv;
 
-import com.seaofnodes.simple.SB;
 import com.seaofnodes.simple.Utils;
-import com.seaofnodes.simple.codegen.*;
 import com.seaofnodes.simple.node.Node;
-import com.seaofnodes.simple.type.TypeInteger;
 
 public class AddIRISC extends ImmRISC {
     // Used to inst-selection as a direct match against an ideal Add/Sub
@@ -13,5 +10,12 @@ public class AddIRISC extends ImmRISC {
     @Override public String glabel() { return "+"; }
     @Override int opcode() {  return riscv.I_TYPE; }
     @Override int func3() {return 0;}
-    @Override public AddIRISC copy() { return new AddIRISC(this,_imm12,false); }
+    @Override public AddIRISC copy() {
+        // Clone the AddI, using the same inputs-only code used during inst select.
+        // Output edges are missing.
+        AddIRISC add = new AddIRISC(in(1),_imm12,false);
+        // Copys happen when output edges should be valid, so correct missing output edges.
+        in(1)._outputs.add(add);
+        return add;
+    }
 }
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/MemOpRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/MemOpRISC.java
index 1e19dfd4..ffa173ef 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/MemOpRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/MemOpRISC.java
@@ -48,18 +48,11 @@ public abstract class MemOpRISC extends MemOpNode implements MachNode {
 
     // 7 bits, 00 000 11 or 00 001 11 for FP
     int opcode(Encoding enc) {
-        if(enc.reg(this) < riscv.F_OFFSET) return 3;
-        else {
-            if(this instanceof LoadRISC) {
-                // opcode is same for 32 bit and 64 bits
-                return 7;
-            }
-            if(this instanceof StoreRISC) {
-                // opcode is the same for 32 bit and 64 bits
-                return 39;
-            }
-        }
-        return enc.reg(this ) < riscv.F_OFFSET ? 3 : 7;
+        if( enc.reg(this) < riscv.F_OFFSET ) return 3;
+        else if( this instanceof StoreRISC )
+            // opcode is the same for 32 bit and 64 bits
+            return 39;
+        return 7;
     }
     short xreg(Encoding enc) {
         short xreg = enc.reg(this );