Make risc op constructors public so that I can subclass them. (#191)

16 files changed, 16 insertions, 16 deletions

diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AndIRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AndIRISC.java
index 9887b735..ba88bb48 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AndIRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AndIRISC.java
@@ -4,7 +4,7 @@ import com.seaofnodes.simple.Utils;
 import com.seaofnodes.simple.node.Node;
 
 public class AndIRISC extends ImmRISC {
-    AndIRISC( Node and, int imm) { super(and,imm); }
+    public AndIRISC( Node and, int imm) { super(and,imm); }
     @Override public String op() { return "andi"; }
     @Override public String glabel() { return "&"; }
     @Override int opcode() {  return riscv.OP_IMM; }
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AndRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AndRISC.java
index ca2f4209..93ef95c0 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AndRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AndRISC.java
@@ -5,7 +5,7 @@ import com.seaofnodes.simple.codegen.*;
 import com.seaofnodes.simple.node.*;
 
 public class AndRISC extends MachConcreteNode implements MachNode {
-    AndRISC(Node and) { super(and); }
+    public AndRISC(Node and) { super(and); }
     @Override public String op() { return "and"; }
     @Override public RegMask regmap(int i) { return riscv.RMASK; }
     @Override public RegMask outregmap() { return riscv.WMASK; }
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/CastRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/CastRISC.java
index dee01217..c404aaa5 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/CastRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/CastRISC.java
@@ -8,7 +8,7 @@ import com.seaofnodes.simple.node.CastNode;
 import com.seaofnodes.simple.node.MachNode;
 
 public class CastRISC extends CastNode implements MachNode {
-    CastRISC( CastNode cast ) { super(cast); }
+    public CastRISC( CastNode cast ) { super(cast); }
     @Override public String op() { return label(); }
     @Override public RegMask regmap(int i) { assert i==1; return RegMask.FULL; }
     @Override public RegMask outregmap() { return RegMask.FULL; }
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/DivRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/DivRISC.java
index 884d7bf9..8367ee68 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/DivRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/DivRISC.java
@@ -5,7 +5,7 @@ import com.seaofnodes.simple.codegen.*;
 import com.seaofnodes.simple.node.*;
 
 public class DivRISC extends MachConcreteNode implements MachNode{
-    DivRISC(Node div) {super(div);}
+    public DivRISC(Node div) {super(div);}
     @Override public String op() { return "div"; }
     @Override public RegMask regmap(int i) { return riscv.RMASK; }
     @Override public RegMask outregmap() { return riscv.WMASK; }
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/MulRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/MulRISC.java
index 12bed9eb..a7961627 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/MulRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/MulRISC.java
@@ -6,7 +6,7 @@ import com.seaofnodes.simple.node.*;
 
 // mulh signed multiply instruction(no-imm form)
 public class MulRISC extends MachConcreteNode implements MachNode{
-    MulRISC(Node mul) {super(mul);}
+    public MulRISC(Node mul) {super(mul);}
     @Override public String op() { return "mul"; }
     @Override public RegMask regmap(int i) { assert i==1 || i==2; return riscv.RMASK; }
     @Override public RegMask outregmap() { return riscv.WMASK; }
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/OrIRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/OrIRISC.java
index d6c32fec..f6a888d9 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/OrIRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/OrIRISC.java
@@ -4,7 +4,7 @@ import com.seaofnodes.simple.Utils;
 import com.seaofnodes.simple.node.Node;
 
 public class OrIRISC extends ImmRISC {
-    OrIRISC( Node and, int imm) { super(and,imm); }
+    public OrIRISC( Node and, int imm) { super(and,imm); }
     @Override int opcode() {  return riscv.OP_IMM; }
     @Override int func3() {  return 6; }
     @Override public String glabel() { return "|"; }
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/OrRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/OrRISC.java
index 6039fa32..103d4c7d 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/OrRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/OrRISC.java
@@ -5,7 +5,7 @@ import com.seaofnodes.simple.codegen.*;
 import com.seaofnodes.simple.node.*;
 
 public class OrRISC extends MachConcreteNode implements MachNode {
-    OrRISC(Node or) { super(or); }
+    public OrRISC(Node or) { super(or); }
     @Override public String op() { return "or"; }
     @Override public RegMask regmap(int i) { return riscv.RMASK; }
     @Override public RegMask outregmap() { return riscv.WMASK; }
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SllIRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SllIRISC.java
index 2ec657ae..4edecc04 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SllIRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SllIRISC.java
@@ -4,7 +4,7 @@ import com.seaofnodes.simple.Utils;
 import com.seaofnodes.simple.node.Node;
 
 public class SllIRISC extends ImmRISC {
-    SllIRISC( Node and, int imm) { super(and,imm); }
+    public SllIRISC( Node and, int imm) { super(and,imm); }
     @Override int opcode() {  return riscv.OP_IMM; }
     @Override int func3() {  return 1; }
     @Override public String glabel() { return "<<"; }
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SllRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SllRISC.java
index 8fd8fb06..87e6693e 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SllRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SllRISC.java
@@ -6,7 +6,7 @@ import com.seaofnodes.simple.node.*;
 
 // Shift left logical
 public class SllRISC extends MachConcreteNode implements MachNode {
-    SllRISC(Node sll) { super(sll); }
+    public SllRISC(Node sll) { super(sll); }
     @Override public String op() { return "shl"; }
     @Override public RegMask regmap(int i) { return riscv.RMASK; }
     @Override public RegMask outregmap() { return riscv.WMASK; }
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SraIRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SraIRISC.java
index 081b4fe0..26404e95 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SraIRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SraIRISC.java
@@ -4,7 +4,7 @@ import com.seaofnodes.simple.Utils;
 import com.seaofnodes.simple.node.Node;
 
 public class SraIRISC extends ImmRISC {
-    SraIRISC( Node and, int imm) { super(and,imm); }
+    public SraIRISC( Node and, int imm) { super(and,imm); }
     @Override int opcode() {  return riscv.OP_IMM; }
     @Override int func3() {  return 5;}
     @Override public String glabel() { return ">>"; }
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SraRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SraRISC.java
index 3d20f02d..1e930e72 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SraRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SraRISC.java
@@ -6,7 +6,7 @@ import com.seaofnodes.simple.node.*;
 
 // Right Shift Arithmetic
 public class SraRISC extends MachConcreteNode implements MachNode {
-    SraRISC(Node sra) { super(sra); }
+    public SraRISC(Node sra) { super(sra); }
     @Override public String op() { return "sar"; }
     @Override public RegMask regmap(int i) { return riscv.RMASK; }
     @Override public RegMask outregmap() { return riscv.WMASK; }
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SrlIRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SrlIRISC.java
index 472ac8b3..ed697678 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SrlIRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SrlIRISC.java
@@ -4,7 +4,7 @@ import com.seaofnodes.simple.Utils;
 import com.seaofnodes.simple.node.Node;
 
 public class SrlIRISC extends ImmRISC {
-    SrlIRISC( Node and, int imm, boolean pop) { super(and,imm,pop); }
+    public SrlIRISC( Node and, int imm, boolean pop) { super(and,imm,pop); }
     @Override int opcode() {  return riscv.OP_IMM; }
     @Override int func3() {  return 5; }
     @Override public String glabel() { return ">>>"; }
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SrlRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SrlRISC.java
index 67a5d40e..47712585 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SrlRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SrlRISC.java
@@ -6,7 +6,7 @@ import com.seaofnodes.simple.node.*;
 
 // Right Shift Logical
 public class SrlRISC extends MachConcreteNode implements MachNode {
-    SrlRISC(Node srli) { super(srli); }
+    public SrlRISC(Node srli) { super(srli); }
     @Override public String op() { return "shr"; }
     @Override public RegMask regmap(int i) { return riscv.RMASK; }
     @Override public RegMask outregmap() { return riscv.WMASK; }
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SubRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SubRISC.java
index ce20f1e1..7ab4f904 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SubRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/SubRISC.java
@@ -5,7 +5,7 @@ import com.seaofnodes.simple.codegen.*;
 import com.seaofnodes.simple.node.*;
 
 public class SubRISC extends MachConcreteNode implements MachNode {
-    SubRISC( Node sub ) { super(sub); }
+    public SubRISC( Node sub ) { super(sub); }
     @Override public String op() { return "sub"; }
     @Override public RegMask regmap(int i) { assert i==1 || i==2; return riscv.RMASK; }
     @Override public RegMask outregmap() { return riscv.WMASK; }
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/XorIRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/XorIRISC.java
index e91ffb9e..61f25be2 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/XorIRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/XorIRISC.java
@@ -4,7 +4,7 @@ import com.seaofnodes.simple.Utils;
 import com.seaofnodes.simple.node.Node;
 
 public class XorIRISC extends ImmRISC {
-    XorIRISC( Node and, int imm) { super(and,imm); }
+    public XorIRISC( Node and, int imm) { super(and,imm); }
     @Override int opcode() {  return riscv.OP_IMM; }
     @Override int func3() {  return 4; }
     @Override public String glabel() { return "^"; }
diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/XorRISC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/XorRISC.java
index 420b59e3..725d2b78 100644
--- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/XorRISC.java
+++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/XorRISC.java
@@ -5,7 +5,7 @@ import com.seaofnodes.simple.codegen.*;
 import com.seaofnodes.simple.node.*;
 
 public class XorRISC extends MachConcreteNode implements MachNode {
-    XorRISC(Node or) { super(or); }
+    public XorRISC(Node or) { super(or); }
     @Override public String op() { return "xor"; }
     @Override public RegMask regmap(int i) { return riscv.RMASK; }
     @Override public RegMask outregmap() { return riscv.WMASK; }