summaryrefslogtreecommitdiff
path: root/chapter22/src/main/java
diff options
context:
space:
mode:
Diffstat (limited to 'chapter22/src/main/java')
-rw-r--r--chapter22/src/main/java/com/seaofnodes/simple/node/MemOpNode.java3
-rw-r--r--chapter22/src/main/java/com/seaofnodes/simple/node/StoreNode.java31
-rw-r--r--chapter22/src/main/java/com/seaofnodes/simple/node/cpus/riscv/Int8RISC.java2
-rw-r--r--chapter22/src/main/java/com/seaofnodes/simple/node/cpus/riscv/LUI.java2
-rw-r--r--chapter22/src/main/java/com/seaofnodes/simple/node/cpus/riscv/riscv.java2
-rw-r--r--chapter22/src/main/java/com/seaofnodes/simple/type/TypeInteger.java8
-rw-r--r--chapter22/src/main/java/com/seaofnodes/simple/type/TypeMem.java1
7 files changed, 28 insertions, 21 deletions
diff --git a/chapter22/src/main/java/com/seaofnodes/simple/node/MemOpNode.java b/chapter22/src/main/java/com/seaofnodes/simple/node/MemOpNode.java
index 058c86fa..bb84019e 100644
--- a/chapter22/src/main/java/com/seaofnodes/simple/node/MemOpNode.java
+++ b/chapter22/src/main/java/com/seaofnodes/simple/node/MemOpNode.java
@@ -75,7 +75,6 @@ public abstract class MemOpNode extends Node {
_declaredType = Type.BOTTOM;
}
- //
static String mlabel(String name) { return "[]".equals(name) ? "ary" : ("#".equals(name) ? "len" : name); }
String mlabel() { return mlabel(_name); }
@@ -85,7 +84,7 @@ public abstract class MemOpNode extends Node {
@Override public StringBuilder _print1( StringBuilder sb, BitSet visited ) { return _printMach(sb,visited); }
public StringBuilder _printMach( StringBuilder sb, BitSet visited ) { throw Utils.TODO(); }
-
+ public int log_size() { return _declaredType.log_size(); }
@Override
public boolean eq(Node n) {
diff --git a/chapter22/src/main/java/com/seaofnodes/simple/node/StoreNode.java b/chapter22/src/main/java/com/seaofnodes/simple/node/StoreNode.java
index 4b73ac1b..2e9e38d5 100644
--- a/chapter22/src/main/java/com/seaofnodes/simple/node/StoreNode.java
+++ b/chapter22/src/main/java/com/seaofnodes/simple/node/StoreNode.java
@@ -84,21 +84,22 @@ public class StoreNode extends MemOpNode {
}
}
- // Store of zero after alloc
- if( mem() instanceof ProjNode prj && prj.in(0) instanceof NewNode &&
- prj.in(0)==ptr().in(0) && // Same NewNode memory & pointer
- (val()._type==TypeInteger.ZERO || val()._type==Type.NIL ) )
- return mem();
-
- // TODO: Needs more love: the shift amount depends on the store size
- //if( val() instanceof SarNode shr &&
- // shr.in(1) instanceof ShlNode shl &&
- // shr.in(2)._type.isConstant() &&
- // shl.in(2)._type.isConstant() ) {
- // if( shl.in(2)._type == shr.in(2)._type )
- // return setDef(3, shl.in(1));
- //}
-
+ if( val() instanceof SarNode shr &&
+ shr.in(1) instanceof ShlNode shl &&
+ shr.in(2)._type.isConstant() &&
+ shl.in(2)._type.isConstant() ) {
+ TypeInteger shrC = (TypeInteger) shr.in(2)._type;
+
+ // size of the thing that sign-extends
+ int base_size = (1 << shr.in(1)._type.log_size()) << 3;
+ int not_affected_bits = base_size - (int) shrC.value();
+ int store_size = (1 << log_size()) << 3;
+ // if the store is unrelated to the shift amount, then get rid of the shift
+ if( shl.in(2)._type == shr.in(2)._type && shrC.value() >= store_size && not_affected_bits >= store_size) {
+ setDef(4, shl.in(1));
+ return this;
+ }
+ }
return null;
}
diff --git a/chapter22/src/main/java/com/seaofnodes/simple/node/cpus/riscv/Int8RISC.java b/chapter22/src/main/java/com/seaofnodes/simple/node/cpus/riscv/Int8RISC.java
index d620a471..f9b7daee 100644
--- a/chapter22/src/main/java/com/seaofnodes/simple/node/cpus/riscv/Int8RISC.java
+++ b/chapter22/src/main/java/com/seaofnodes/simple/node/cpus/riscv/Int8RISC.java
@@ -32,7 +32,7 @@ public class Int8RISC extends ConstantNode implements MachNode, RIPRelSize {
// Delta is from opcode start
@Override public void patch( Encoding enc, int opStart, int opLen, int delta ) {
- short dst = (short)(enc.reg(this));
+ short dst = enc.reg(this);
short tmp = (short)riscv.T6;
// AUIPC dst,#hi20_constant_pool
enc.patch4(opStart , riscv.u_type(riscv.OP_AUIPC, tmp, delta>>12));
diff --git a/chapter22/src/main/java/com/seaofnodes/simple/node/cpus/riscv/LUI.java b/chapter22/src/main/java/com/seaofnodes/simple/node/cpus/riscv/LUI.java
index 75ad6496..b65afc79 100644
--- a/chapter22/src/main/java/com/seaofnodes/simple/node/cpus/riscv/LUI.java
+++ b/chapter22/src/main/java/com/seaofnodes/simple/node/cpus/riscv/LUI.java
@@ -10,7 +10,7 @@ import com.seaofnodes.simple.type.TypeInteger;
public class LUI extends ConstantNode implements MachNode {
public LUI( int imm20 ) {
super(TypeInteger.constant(imm20));
- assert riscv.imm20Exact((TypeInteger)_con);
+ assert (imm20 & 0xFFF)==0;
}
@Override public RegMask regmap(int i) { return null; }
@Override public RegMask outregmap() { return riscv.WMASK; }
diff --git a/chapter22/src/main/java/com/seaofnodes/simple/node/cpus/riscv/riscv.java b/chapter22/src/main/java/com/seaofnodes/simple/node/cpus/riscv/riscv.java
index 3b8ff100..9c5bfa10 100644
--- a/chapter22/src/main/java/com/seaofnodes/simple/node/cpus/riscv/riscv.java
+++ b/chapter22/src/main/java/com/seaofnodes/simple/node/cpus/riscv/riscv.java
@@ -318,7 +318,7 @@ public class riscv extends Machine {
// shift left 32 to clear out the upper 32 bits.
// shift right SIGNED to sign-extend upper 32 bits; then shift 12 more to clear out lower 12 bits.
// shift left 12 to re-center the bits.
- return ti.isConstant() && (((ti.value()<<32)>>>44)<<12) == ti.value();
+ return ti.isConstant() && (((ti.value()<<32)>>44)<<12) == ti.value();
}
@Override public Node instSelect( Node n ) {
diff --git a/chapter22/src/main/java/com/seaofnodes/simple/type/TypeInteger.java b/chapter22/src/main/java/com/seaofnodes/simple/type/TypeInteger.java
index 9f017fd1..1128ce24 100644
--- a/chapter22/src/main/java/com/seaofnodes/simple/type/TypeInteger.java
+++ b/chapter22/src/main/java/com/seaofnodes/simple/type/TypeInteger.java
@@ -75,11 +75,17 @@ public class TypeInteger extends Type {
@Override public boolean isConstant() { return _min == _max; }
@Override public int log_size() {
+ assert !isHigh(); // High types are dead, and should never hit code emission.
if( this==I8 || this==U8 || this==BOOL ) return 0; // 1<<0 == 1 bytes
if( this==I16 || this==U16 ) return 1; // 1<<1 == 2 bytes
if( this==I32 || this==U32 ) return 2; // 1<<2 == 4 bytes
if( this==BOT ) return 3; // 1<<3 == 8 bytes
- if( isHighOrConst() ) return 0;
+ if( isConstant() ) { // just const here
+ if (-0xFF <= _min && _min <= 0xFF) return 0;
+ else if (-0xFFFF <= _min && _min <= 0xFFFF) return 1;
+ else if (-0xFFFFFFFFL <= _min && _min <= 0xFFFFFFFFL) return 2;
+ else return 3;
+ }
throw Utils.TODO();
}
diff --git a/chapter22/src/main/java/com/seaofnodes/simple/type/TypeMem.java b/chapter22/src/main/java/com/seaofnodes/simple/type/TypeMem.java
index 9be4908b..63fb30ce 100644
--- a/chapter22/src/main/java/com/seaofnodes/simple/type/TypeMem.java
+++ b/chapter22/src/main/java/com/seaofnodes/simple/type/TypeMem.java
@@ -50,6 +50,7 @@ public class TypeMem extends Type {
}
@Override public boolean isHigh() { return _t.isHigh(); }
+ @Override public int log_size() { throw Utils.TODO(); }
@Override public Type glb(boolean mem) { return make(_alias,_t.glb(true)); }
@Override int hash() { return 9876543 + _alias + _t.hashCode(); }