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* Restrict subtraction zero peepholes to integer operandspr254-fixesCliff Click2026-09-253-5/+21
| | | | | | Require resolved integer mode in chapter 25 so zero subtraction preserves floating-point signed zero. Keep nonnumeric operands in the graph for subtraction diagnostics. Add signed-zero coverage from chapter 12 and null-subtraction diagnostics from chapter 22. Confirmed the regressions fail on the original PR. Full Make suites pass in chapters 4-25 (5462 tests), including fresh chapter 25 sys.o compilation.
* Add testsfuhsnn2026-09-251-0/+28
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* Extend and backport SubNode peepholefuhsnn2026-09-251-4/+15
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* Bunch better layout optionsCliff Click2026-09-241-1/+3
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* Keyboard shortcutsCliff Click2026-09-234-4/+20
| | | | | Fast forward/reverse, pick-a-frame. Shorter type names.
* Graph cleanupCliff Click2026-09-222-1/+3
| | | | Phis stay with regions, stop sinks to bottom,
* Tidy up scope displayCliff Click2026-09-221-1/+1
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* Add shared graph viewer to all chaptersCliff Click2026-09-2234-1038/+162
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* move the graph visualizer into shared codeCliff Click2026-09-217-2270/+90
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* Final reg-alloc across chapters cleanupCliff Click2026-09-209-25/+84
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* Split self-conflict phis once at a loop headCliff Click2026-09-2028-177/+842
| | | | if this works, saves a copy-per-loop. If it fails, next round split as normal
* Popular use grouping for RegAllocCliff Click2026-09-208-67/+209
| | | | Fix arm BL encodings; ADD/SUB with reversed sign.
* Forward-port allocator bug fixes and test support through ch25Cliff Click2026-09-2015-64/+351
| | | | Improved spilling
* Add back copy coaleascing in ch21Cliff Click2026-09-203-3/+34
| | | | Minor arm encoding fix.
* Backport TypeFunPtr normalizationCliff Click2026-09-201-1/+18
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* Unify GCM across chaptersCliff Click2026-09-207-111/+127
| | | | | | Remove the _anti field. Remove the isPinned() call. Add a copyEmpty call.
* Unify mixed-return checking and resultsCliff Click2026-09-1914-49/+90
| | | | Unify dominator caching.
* Use isDead() instead of checking null inputsCliff Click2026-09-191-1/+1
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* Fixed st8 on arm/risc evalsCliff Click2026-09-193-2/+30
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* debug printers no longer call self-optimizing accessorsCliff Click2026-09-1920-21/+250
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* Tighter recursive-struct testCliff Click2026-09-192-1/+22
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* Handle double-negation preserving not-null knowledgeCliff Click2026-09-193-3/+121
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* Backport string escapes and many op-assignCliff Click2026-09-173-11/+212
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* Parser fix OR tempsCliff Click2026-09-172-1/+43
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* Backport x86 Not encodingCliff Click2026-09-172-10/+51
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* x86 mul reg reg encoding fixCliff Click2026-09-174-35/+81
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* Back point cmpmem encodingCliff Click2026-09-172-1/+34
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* Get makefiles and fuzzer testing uniform across chaptersCliff Click2026-09-174-15/+50
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* Fix stale copy-pasted comment on BoolNode's phiCon call (#249)Symious2026-09-091-3/+3
| | | | | | | | | | | | | | | | | | The three comment lines above `AddNode.phiCon(this, ...)` in BoolNode were copy-pasted from MulNode and never adapted: they use `*` as the operator and describe the rotated shape `(x * (phi cons)) * con`. For BoolNode neither is right. The operator is a compare, and in chapters 6-9 `rotate` is hard-coded `false`, so the rotated shape is never matched; the shapes actually handled are `(phi cons) cmp con` and `(phi cons) cmp (phi cons)`. Reword the comment accordingly, and in chapters 6-9 add a line noting why rotate is off. Chapters 10-25 pass `this instanceof EQ`, so no such claim is made there. Comment-only change; no code is touched. Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
* Chapter 25: add separate compilation and simplify SSA constructionCliff Click2026-08-101-391/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce Chapter 25 with separately compiled Simple modules, serialized IR, cross-compilation-unit linking, and native system-library integration. This also completes a broad parser and type-system cleanup needed to make graph construction independent of incomplete parse-time type information. Separate compilation and linking - Add compilation-unit Start/Stop nodes and track functions, classes, aliases, and global indices across compilation-unit boundaries. - Serialize canonical types and ideal graph nodes into ELF objects, including dependency metadata, relocations, global/local bitset remapping, and dense memory-alias information. - Load dependent objects on demand, recursively resolve source and object paths, relink calls and function pointers, and preserve external C symbols. - Distinguish the post-optimization ownership hook from unknown callers so private call graphs can remain precise while public functions remain externally callable. - Add command-line and build support for compiling modules and the reusable `sys` object library. Parser, constructors, and SSA - Replace inline constructor expansion with a hidden default `<init>` followed by an explicit user constructor declared as `new Type = { ... }`. - Keep the default constructor private, pass private object memory through constructor calls, and require user constructors to initialize non-default fields before the object escapes. - Track possibly-uninitialized fields in parser `Var` state and diagnose early reads without encoding parser-only constraints in Load and Store nodes. - Make ordinary parser memory bulk and recover precise alias slices in the optimizer using `MemMerge`, `MemPhi`, and `BulkMemPhi` nodes. - Remove parser-supplied type constraints from Loads and ordinary Phis, defer integer/float arithmetic selection, and keep call shape driven by syntax instead of provisional inferred types. - Preserve chained field declarations as static parser information when flow types are not yet available, including postfix field updates through calls. Types, functions, and escape analysis - Add `TypeScalar` as the common lattice family for integer, float, memory pointer, and function-pointer values, with scalar TOP/BOT values for generic Loads, Stores, parameters, and invalid intermediate expressions. - Represent unresolved struct definitions directly with the `TypeStruct` forward-reference flag while retaining the separate open-structure concept; close and canonicalize recursive structures without side maps. - Add explicit `FunPtrNode` references so constant function pointers retain a graph edge to their Return, and keep referenced functions alive until Opto proves the pointer dead. - Refine public-function and class-initializer escape handling, including public-only fallback escape sets and monotone compilation-unit summaries. - Add guards, proof casts, read-only propagation, pointer-to-integer conversion for non-null FFI arguments, and consistent deep mutability checks at calls. Optimization and code generation - Make weak and unresolved graph inputs compute conservatively and monotonically throughout iterative peepholes and SCCP. - Preserve independent memory slices when sharpening Stores, retain control on conditional Stores, and freeze Store widths from their target field types. - Extend serialization for new node kinds, scalar types, Store modes, function pointers, and memory partitions, preserving serialize/deserialize bijection. - Complete native selection and encoding support across x86-64, RISC-V, and ARM, including FFI pointer conversion and missing integer operations. - Fix x86 immediate multiply REX encoding and assorted scheduling, register allocation, spilling, relocation, and constant-pool issues exposed by the larger linked graphs. System library, tests, and documentation - Compile and link the Simple `sys` library, including libc bindings, I/O, scanners, strings, vectors, array helpers, and executable entry points. - Add Chapter 25 module, serialization, constructor, forward-reference, postfix-update, system, Hello World, and Bubble Sort coverage; update golden graphs and spill expectations for the new IR shape. - Add module and type-system documentation, parser-simplification design notes, grammar updates, examples, diagrams, and graph visualization assets. The resulting compiler passes the raw Chapter 1-24 suite and the Chapter 25 system and separate-compilation tests, including a freshly rebuilt `sys.o` and the native Bubble Sort example.
* Move `addUse()` return statement to `keep()` (#243)Hsiang-Ying Fu2026-07-031-7/+4
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* Series of minor fixesCliff Click2026-07-034-25/+25
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* minor typoesCliff Click2026-01-251-1/+1
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* Missing depCliff Click2025-10-111-1/+5
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* Chaining Conditionals and SCCP (#230)Cliff Click2025-09-2251-322/+1015
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * merge fixup * More x86,risc,arm call convention fixes Collect callee and caller save masks (inverts of each other, except for spills). Reorg layout to be closer to each other; remove dead mask definitions; add final keyword * lui fix up with 32 bit immediates * Callee-save registers Callee-save registers and masks and inserting LRGs for same and spilling and picking good spills. Insert CalleeSaveNodes and edges to RetXXXs and RegMasks for those edges. Iterators for regmask. Better printing post-allocation * RegMask supports 128 bits All regs available arm, risc. MergeSort compiles & runs * added flags splitting * Fix risc5 compares No flags on risc5. Branch takes 2 inputs (one can be imm12). Float compare only sets a GPR to 0/1. Bool has a isFloat Common risc5 imm-form handling * extend test cases * imm encoding, flags fixed * grep for Todo: relocs * float riscv fixed * flags for set * lui fix for small bits [0, 12] * arm init * arm last touches * fmov still needs fix * minor fixes * minor fixes(2) * got rid of unnecessary stuff * create ch21 * remove encodings from chapter20 dir * 1/2 pass cleaning up ARM encoding API * ARM encoding compiles * Risc R_TYPE and I_TYPE * Progress RISC encodings Missing lots of stuff still * progress risc encoding * risc encodings compile * Update README.md * Fold up redundant OP/OP-FP risc5 encoding * x86 mem opcodes first cut break out MemOp encodings into parts; change x86 indirectAdr to use Encoding class, remove redundant asserts & code * x86 mem op encodings * x86 reg+imm forms * most reg-reg forms * More x86 encodings * Last few encodings * switch to binary literals over decimals for opcodes * logical immediates fixed, bitwise ops imm forms * tfp and setArm fixed * PC relative float for riscv * readme init * Merged pr/169 * Fixed the array1 test encodings Clean up branch invert logic during BB layout Cleanup branch target printing for RISC,ARM ImmRISC ops mask imm12 to 12 bits Fix NewRISC; hardcode RPC as part of call Fix RISC inverting branchs >,>= * floatarm encoding * tfparm and intarm * uncontional jump encoding for arm and riscv * smarter IntARM, Intx86 does not always include rex. * REX after PREFIX * fixup load and store indirect * updated rex prefix, if its 0x40 then its not needed * Rex fix for floats, got rid of unnecessary stuff. * rename to camel case, better param name * add test export * merged * store opt * store and load optimised forms handled * tfp patch * Store/load float arm/riscv/x64 * got rid of debug print * splits for x86, riscv and arm * readme fixups * fix global symbol numbering for constants * fix TFP pathc on arm and riscv, keep symbols in good order. * fix opcode for store and loads, memOpRisc for Store and splitting * replace hard coded opcodes with major opcodes * replace hard coded opcodes with major opcodes * add asserts and fix reg numbering * add asserts and fix reg numbering * minor updates * revert changes * remove constant pool from encoder TODO: add flag for JIT * extend test cases * minor fixes * minor fixes * update float test case * stringHash fix on x64 * remove conditional ConstantPool write * brainfuck minor fixes * minor arm fixes * split fix * brainfuck and fib * brain fuck * arg_count, person * add ignore * typo * riscv test sieve attempt * minor changes * riscv5 emulator additions * arm eval setup * Update riscv.java * arm eval basics * delta fixes * arm fixes * testfib arm * arg_count * small update for test newton * small update for test newton * testNewton runs on x64, riscv and arm * arm additions * arm pc eval fix * arm workings * debugging * Progress sieve on ARM Most ops need WMASK as the output, to exclude RSP. calloc sentinal changes to multiple of 4 NewArm needs to set arg X0 to #1; arg X1 is length. Fix EvalARM calling calloc & not advancing PC. Fix EvalARM using ints vs longs. Fix EvalARM missing AndI encoding. * Fix some arm encoding Fix some OBOB in R5 calloc encoding. Sort EvalArm by major opcodes. Add ASL. Remove leading switch. Fix OBOB in calloc. Fix shift in ld/st with reg+offset * arm sieve test * test person push * brainFuck arm * "and" "or" syntactic sugar * update encoding * ch23 `and` `or` * hack parse trinary for and, or * close * fixed or issue * Update CallEndNode.java * fix type issue * fixed * Adjust parseTrinary precedence vs && || * Fix arm simulation return * Formatting * Formatting * simplify rn to be always 0. * ch24 init * stacked rel * stack init * stack rel * remove parenthesis * got rid of old test case * update * upgrade eval * arm encoding bugs encodeing cset had a shift wrong eval missed using 0 for r31 * remove debug prints * force main to encode first * fix for missing main * got rid of debug prints * backwards with ch23 * simple new test cases * update test cases * enable old test * got rid of own test case * fix test11 * inline Api * inline x86_64 * inline test cases * fix stacked_r_5 * got rid of redundant rdid -1 set * Several new fuzzer addDeps/keep bugs. Fix risc/arm spill code values for passing 20 args. * Update README Move ch23_ch24 branch into ROADMAP * Create TypeAnalysis.md * Update TypeAnalysis.md * Update TypeAnalysis.md * More lattices for main * Update TypeAnalysis.md * Update TypeAnalysis.md * TypeAnalysis continued * fix typos * pointers * typo fix in reader * Update TypeAnalysis.md * sccp first attempt * test * init * still debug * Update TypeAnalysis.md * more examples * More docs * Update TypeAnalysis.md * widen phi nodes in loops * extra debug stuff for opto * Work in progress opto pass * Progress on opto * opto missing deps ConFldOff needs String.equals in `eq` Fix monotonic xfer functions in - CallENd, CProj, Load, Arith Mostly if either TOP or BOT inputs, the output is the matching TOP or BOT * push mid-progress * progress sccp * Make all the default parser integer types pre-widen Function sigs to calls allow wide ints * progress sccp * Update TypeInteger.java * progress SCCP * Progress SCCP * Progress SCCP A series of minor fixes, generally making transfer functions monotonic, or p[reserving sanity for error test cases. * Progress on opto Most tests pass, a few failures remain. Split Opto code into a seperate file. Improve `compute` precision in several places showing up during opto. bugfix: "split-thru-phis" on Parms changes calling conventions. Not ready for that yet. * most tests pass Handle non-default main. Simplify trivial inlining cutout test. ParmNode excludes most Phi opts Region idom excludes dead paths RPC now interns * Fix arm NOT encoding * all tests pass Float math handles high types monotonically Minus node does not reset int widen. Phi widen handles non-int mintype Dead returns do not error complain. Better handling default vs dead main * If NewNode is high, produce high results * BrainFuck uses a string * README * Update README.md * Typos from copilot review * monotonic fix MinusF * Update TypeAnalysis.md * Update TypeInteger.java --------- Co-authored-by: Hadházy Tamás <helsgithub15@gmail.com> Co-authored-by: Tamás Hadházy <85063808+Hels15@users.noreply.github.com>
* chapter24 chaining operator test cases (#227)Tamás Hadházy2025-08-1455-6293/+1488
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Update Chapter14Test.java * fixed order of operands * base rex fixup * more bug fix * remove jukn files * minimal "make release" * further fixes * minor fixes * minor fixes * minor fixes * base != -1 check, precedence fix * Add regkills in IFG building Fix bug LRG union stats Adjust self-conflict splits to be slightly less aggressive In every use-side split, dont split-after-split same block. NewNode is a multi, does not define a register * 64 bit encoding for gpr(s) load * RA improvements Attempt to commute to keep reg-masks compatible. Clones with kills (x86 XOR killing flags to zero) fail before the flag-def. Bugfix failed to color last lrg. More smarts on picking trivial LRGs during coloring Drop isSplit, add SplitNode Pass regalloc round to all splits for debugging Self-conflict no split on loop backedge. Handle split that gets made goes dead No-reg-mask spilling handles case with many def/uses. Add DivIX86 BrainFuck, MergeSort now allocate as testing * 8 bit imm support * conditional jump fix * Push l,ast change, unbreak branch * XOR remove extra opcode, imm size supports 8 bit. * Finally pass the `new [u8]` double-copy test * Fix several ARM reg setup problems Finish Split bypass check ARM: rsp is also a fixed zero, in R31. R0 is a valid register. CallArm prints args, passes TFP for arg selection. Does not return a register. All CallEndARM which DOES return a register. Parms missing tfp for float args. ProjARM after a New missing regs. RetARM missing RPC. Remove hopeful DivIX86 * 64 bit imm for alu ops encoded in extra reg then use it in Op as an operand * Bunch of minor arm, risc fixes small constants not cloning * jump invert encoding * warning comment * Much ARM fixage One More Go-Round with Better Biased Colors Fix bug picking deepest spills to bias. ARM: remove default 2-address. Fix regmask overflow. Rename some ops to be canonical. * Fixes to release Port does not have to be in a Simple named directory. Call convention is just a string, no enum Missed some tests running RISC, ARM. * Minor release change to allow another foreign port * better split encoding and fix CallInMask * notNode * fix callInMask * riscv init * riscv basic ALU ops and types of instructions * Allowing non-Simple repo ports Expanding public API slightly so alternative (non-Simple repo) ports can happen. RegMask supports single-bit-set and a long bitmask. Bugfix GCM splitting multiple global constants. Bugfix LCM grabbing a projection vs multi Bugfix RegAlloc when avoiding splitting a clonable Source code in release More timing in CodeGen * riscv indirect addressing and function calls * Cleanup call ABI presentation Everybody uses the same names, same code shapes * Caller save regs ...not callee save yet * Expose caller save regs * Store Risc adjustments, no imm in MemOpRISC * specific print encoding for cpus * merge fixup * More x86,risc,arm call convention fixes Collect callee and caller save masks (inverts of each other, except for spills). Reorg layout to be closer to each other; remove dead mask definitions; add final keyword * lui fix up with 32 bit immediates * Callee-save registers Callee-save registers and masks and inserting LRGs for same and spilling and picking good spills. Insert CalleeSaveNodes and edges to RetXXXs and RegMasks for those edges. Iterators for regmask. Better printing post-allocation * RegMask supports 128 bits All regs available arm, risc. MergeSort compiles & runs * added flags splitting * Fix risc5 compares No flags on risc5. Branch takes 2 inputs (one can be imm12). Float compare only sets a GPR to 0/1. Bool has a isFloat Common risc5 imm-form handling * extend test cases * imm encoding, flags fixed * grep for Todo: relocs * float riscv fixed * flags for set * lui fix for small bits [0, 12] * arm init * arm last touches * fmov still needs fix * minor fixes * minor fixes(2) * got rid of unnecessary stuff * create ch21 * remove encodings from chapter20 dir * 1/2 pass cleaning up ARM encoding API * ARM encoding compiles * Risc R_TYPE and I_TYPE * Progress RISC encodings Missing lots of stuff still * progress risc encoding * risc encodings compile * Update README.md * Fold up redundant OP/OP-FP risc5 encoding * x86 mem opcodes first cut break out MemOp encodings into parts; change x86 indirectAdr to use Encoding class, remove redundant asserts & code * x86 mem op encodings * x86 reg+imm forms * most reg-reg forms * More x86 encodings * Last few encodings * switch to binary literals over decimals for opcodes * logical immediates fixed, bitwise ops imm forms * tfp and setArm fixed * PC relative float for riscv * readme init * Merged pr/169 * Fixed the array1 test encodings Clean up branch invert logic during BB layout Cleanup branch target printing for RISC,ARM ImmRISC ops mask imm12 to 12 bits Fix NewRISC; hardcode RPC as part of call Fix RISC inverting branchs >,>= * floatarm encoding * tfparm and intarm * uncontional jump encoding for arm and riscv * smarter IntARM, Intx86 does not always include rex. * REX after PREFIX * fixup load and store indirect * updated rex prefix, if its 0x40 then its not needed * Rex fix for floats, got rid of unnecessary stuff. * rename to camel case, better param name * add test export * merged * store opt * store and load optimised forms handled * tfp patch * Store/load float arm/riscv/x64 * got rid of debug print * splits for x86, riscv and arm * readme fixups * fix global symbol numbering for constants * fix TFP pathc on arm and riscv, keep symbols in good order. * fix opcode for store and loads, memOpRisc for Store and splitting * replace hard coded opcodes with major opcodes * replace hard coded opcodes with major opcodes * add asserts and fix reg numbering * add asserts and fix reg numbering * minor updates * revert changes * remove constant pool from encoder TODO: add flag for JIT * extend test cases * minor fixes * minor fixes * update float test case * stringHash fix on x64 * remove conditional ConstantPool write * brainfuck minor fixes * minor arm fixes * split fix * brainfuck and fib * brain fuck * arg_count, person * add ignore * typo * riscv test sieve attempt * minor changes * riscv5 emulator additions * arm eval setup * Update riscv.java * arm eval basics * delta fixes * arm fixes * testfib arm * arg_count * small update for test newton * small update for test newton * testNewton runs on x64, riscv and arm * arm additions * arm pc eval fix * arm workings * debugging * Progress sieve on ARM Most ops need WMASK as the output, to exclude RSP. calloc sentinal changes to multiple of 4 NewArm needs to set arg X0 to #1; arg X1 is length. Fix EvalARM calling calloc & not advancing PC. Fix EvalARM using ints vs longs. Fix EvalARM missing AndI encoding. * Fix some arm encoding Fix some OBOB in R5 calloc encoding. Sort EvalArm by major opcodes. Add ASL. Remove leading switch. Fix OBOB in calloc. Fix shift in ld/st with reg+offset * arm sieve test * test person push * brainFuck arm * "and" "or" syntactic sugar * update encoding * ch23 `and` `or` * hack parse trinary for and, or * close * fixed or issue * Update CallEndNode.java * fix type issue * fixed * Adjust parseTrinary precedence vs && || * Fix arm simulation return * Formatting * Formatting * simplify rn to be always 0. * ch24 init * stacked rel * stack init * stack rel * remove parenthesis * got rid of old test case * update * upgrade eval * arm encoding bugs encodeing cset had a shift wrong eval missed using 0 for r31 * remove debug prints * force main to encode first * fix for missing main * got rid of debug prints * backwards with ch23 * simple new test cases * update test cases * enable old test * got rid of own test case * fix test11 * inline Api * inline x86_64 * inline test cases * fix stacked_r_5 * got rid of redundant rdid -1 set * Several new fuzzer addDeps/keep bugs. Fix risc/arm spill code values for passing 20 args. * Update README Move ch23_ch24 branch into ROADMAP --------- Co-authored-by: Cliff Click <cliffc@acm.org>
* Cleanup chained oper testsCliff Click2025-08-104-449/+132
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* Op Chaining (#224)Tamás Hadházy2025-08-09363-0/+44572
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * indirect addressing modes * setop change opcode, rename FLOAT_OFFSET * mask sib and modrm with 3 bits, 4th bit goes into rex. * sign extend div with cqo * idiv input is fixed to rax and RMASK, grab input from second slot when encoding * encoding of newx86 * tfp and CallEndNode encoding * sib improvement * more cleanups * more cleanups * Allow a killMap to kill regs. Bugfix scheduler. Bugfix spiller - self-conflict order depended on hashtable iteration order, which depended on System.hashCode which would vary run to run. Improvements to coloring Improvements to spill quality testing * Added flags-kill for XOR * Missing add-deps from fuzzer * Update Chapter14Test.java * fixed order of operands * base rex fixup * more bug fix * remove jukn files * minimal "make release" * further fixes * minor fixes * minor fixes * minor fixes * base != -1 check, precedence fix * Add regkills in IFG building Fix bug LRG union stats Adjust self-conflict splits to be slightly less aggressive In every use-side split, dont split-after-split same block. NewNode is a multi, does not define a register * 64 bit encoding for gpr(s) load * RA improvements Attempt to commute to keep reg-masks compatible. Clones with kills (x86 XOR killing flags to zero) fail before the flag-def. Bugfix failed to color last lrg. More smarts on picking trivial LRGs during coloring Drop isSplit, add SplitNode Pass regalloc round to all splits for debugging Self-conflict no split on loop backedge. Handle split that gets made goes dead No-reg-mask spilling handles case with many def/uses. Add DivIX86 BrainFuck, MergeSort now allocate as testing * 8 bit imm support * conditional jump fix * Push l,ast change, unbreak branch * XOR remove extra opcode, imm size supports 8 bit. * Finally pass the `new [u8]` double-copy test * Fix several ARM reg setup problems Finish Split bypass check ARM: rsp is also a fixed zero, in R31. R0 is a valid register. CallArm prints args, passes TFP for arg selection. Does not return a register. All CallEndARM which DOES return a register. Parms missing tfp for float args. ProjARM after a New missing regs. RetARM missing RPC. Remove hopeful DivIX86 * 64 bit imm for alu ops encoded in extra reg then use it in Op as an operand * Bunch of minor arm, risc fixes small constants not cloning * jump invert encoding * warning comment * Much ARM fixage One More Go-Round with Better Biased Colors Fix bug picking deepest spills to bias. ARM: remove default 2-address. Fix regmask overflow. Rename some ops to be canonical. * Fixes to release Port does not have to be in a Simple named directory. Call convention is just a string, no enum Missed some tests running RISC, ARM. * Minor release change to allow another foreign port * better split encoding and fix CallInMask * notNode * fix callInMask * riscv init * riscv basic ALU ops and types of instructions * Allowing non-Simple repo ports Expanding public API slightly so alternative (non-Simple repo) ports can happen. RegMask supports single-bit-set and a long bitmask. Bugfix GCM splitting multiple global constants. Bugfix LCM grabbing a projection vs multi Bugfix RegAlloc when avoiding splitting a clonable Source code in release More timing in CodeGen * riscv indirect addressing and function calls * Cleanup call ABI presentation Everybody uses the same names, same code shapes * Caller save regs ...not callee save yet * Expose caller save regs * Store Risc adjustments, no imm in MemOpRISC * specific print encoding for cpus * merge fixup * More x86,risc,arm call convention fixes Collect callee and caller save masks (inverts of each other, except for spills). Reorg layout to be closer to each other; remove dead mask definitions; add final keyword * lui fix up with 32 bit immediates * Callee-save registers Callee-save registers and masks and inserting LRGs for same and spilling and picking good spills. Insert CalleeSaveNodes and edges to RetXXXs and RegMasks for those edges. Iterators for regmask. Better printing post-allocation * RegMask supports 128 bits All regs available arm, risc. MergeSort compiles & runs * added flags splitting * Fix risc5 compares No flags on risc5. Branch takes 2 inputs (one can be imm12). Float compare only sets a GPR to 0/1. Bool has a isFloat Common risc5 imm-form handling * extend test cases * imm encoding, flags fixed * grep for Todo: relocs * float riscv fixed * flags for set * lui fix for small bits [0, 12] * arm init * arm last touches * fmov still needs fix * minor fixes * minor fixes(2) * got rid of unnecessary stuff * create ch21 * remove encodings from chapter20 dir * 1/2 pass cleaning up ARM encoding API * ARM encoding compiles * Risc R_TYPE and I_TYPE * Progress RISC encodings Missing lots of stuff still * progress risc encoding * risc encodings compile * Update README.md * Fold up redundant OP/OP-FP risc5 encoding * x86 mem opcodes first cut break out MemOp encodings into parts; change x86 indirectAdr to use Encoding class, remove redundant asserts & code * x86 mem op encodings * x86 reg+imm forms * most reg-reg forms * More x86 encodings * Last few encodings * switch to binary literals over decimals for opcodes * logical immediates fixed, bitwise ops imm forms * tfp and setArm fixed * PC relative float for riscv * readme init * Merged pr/169 * Fixed the array1 test encodings Clean up branch invert logic during BB layout Cleanup branch target printing for RISC,ARM ImmRISC ops mask imm12 to 12 bits Fix NewRISC; hardcode RPC as part of call Fix RISC inverting branchs >,>= * floatarm encoding * tfparm and intarm * uncontional jump encoding for arm and riscv * smarter IntARM, Intx86 does not always include rex. * REX after PREFIX * fixup load and store indirect * updated rex prefix, if its 0x40 then its not needed * Rex fix for floats, got rid of unnecessary stuff. * rename to camel case, better param name * add test export * merged * store opt * store and load optimised forms handled * tfp patch * Store/load float arm/riscv/x64 * got rid of debug print * splits for x86, riscv and arm * readme fixups * fix global symbol numbering for constants * fix TFP pathc on arm and riscv, keep symbols in good order. * fix opcode for store and loads, memOpRisc for Store and splitting * replace hard coded opcodes with major opcodes * replace hard coded opcodes with major opcodes * add asserts and fix reg numbering * add asserts and fix reg numbering * minor updates * revert changes * remove constant pool from encoder TODO: add flag for JIT * extend test cases * minor fixes * minor fixes * update float test case * stringHash fix on x64 * remove conditional ConstantPool write * brainfuck minor fixes * minor arm fixes * split fix * brainfuck and fib * brain fuck * arg_count, person * add ignore * typo * riscv test sieve attempt * minor changes * riscv5 emulator additions * arm eval setup * Update riscv.java * arm eval basics * delta fixes * arm fixes * testfib arm * arg_count * small update for test newton * small update for test newton * testNewton runs on x64, riscv and arm * arm additions * arm pc eval fix * arm workings * debugging * Progress sieve on ARM Most ops need WMASK as the output, to exclude RSP. calloc sentinal changes to multiple of 4 NewArm needs to set arg X0 to #1; arg X1 is length. Fix EvalARM calling calloc & not advancing PC. Fix EvalARM using ints vs longs. Fix EvalARM missing AndI encoding. * Fix some arm encoding Fix some OBOB in R5 calloc encoding. Sort EvalArm by major opcodes. Add ASL. Remove leading switch. Fix OBOB in calloc. Fix shift in ld/st with reg+offset * arm sieve test * test person push * brainFuck arm * "and" "or" syntactic sugar * update encoding * ch23 `and` `or` * hack parse trinary for and, or * close * fixed or issue * Update CallEndNode.java * fix type issue * fixed * Adjust parseTrinary precedence vs && || * Fix arm simulation return * Formatting * Formatting * simplify rn to be always 0. * ch24 init * stacked rel * stack init * stack rel * remove parenthesis * got rid of old test case * update * upgrade eval * arm encoding bugs encodeing cset had a shift wrong eval missed using 0 for r31 * remove debug prints * force main to encode first * fix for missing main * got rid of debug prints * backwards with ch23 --------- Co-authored-by: Cliff Click <cliffc@acm.org>
* Squashed commit of the following:Cliff Click2025-06-131-0/+345
commit 2c31fa61d71fcbcf160edef5aba874913e63859a Author: Cliff Click <cliffc@acm.org> Date: Sat Jun 7 16:34:11 2025 -0700 README, comments commit 8be23b15ad007509c9006a121328ce6615b912f6 Author: Cliff Click <cliffc@acm.org> Date: Sat Jun 7 10:16:20 2025 -0700 Cleanup on sys ADT BubbleSort looks cleaner Cleanup recursive type handling commit 145f977b53b3a9e89e984ae7af4bb3d8fd7768bb Author: Cliff Click <cliffc@acm.org> Date: Fri Jun 6 15:47:09 2025 -0700 More methods Removing a Phi keeps mintype lifting until consumers no longer expect it. Load, Store, MemMerge all "peek" through mem Cast and MemMerge. Bugfix, clone a constant near a required spill-use when passing constant stack arg. Bugfix, missing dep when upgrading a type allows inlining. Bugfix NegX86 is 2-adr Bugfix, x86 cmp imm vs mem cannot swap args. Bugfix, methods save/restore struct init values. Bugfix, method vars can be set. Repeat psudo-optimistic pass removing dead calls (tree shaking). Add basic lib calls for Vectors for i64 and u8. commit 04953c112a83de6127b6b2058a4bfbc344a3a02b Author: Cliff Click <cliffc@acm.org> Date: Tue Jun 3 15:58:03 2025 -0700 improve BubbleSort Bugfix uctrlSkipEmpty did not stop at Calls. Bugfix Phi skip mem alias uses 1 as default mem. Bugfix cyclic install uses uniform walking method to catch all cases. Drop % to mark static methods. Methods are static when not using the 'self' argument. Encoding records when it inserts function header padding, so the ASMPrinter gets offsets right. Encoding improve BB layout other things being equal. commit f42903ff30c533a78adfdc43407da29711a83ad9 Author: Cliff Click <cliffc@acm.org> Date: Mon Jun 2 09:31:09 2025 -0700 Methods Block scoping now carries more Kind info, including constructor Type; fold Kind and lexSize info together. Static calls need extra syntax `{% args ->body }` Mem Phis more precise minType. Mem Phi peeks through MemMerge. TypeMem BOT/TOP alias is now#1 to match the Parsers notion of "all mem". Missing dep. Eval2 constant array bugfix. commit aeb0a01e27e63ff6f8a2399523aa9f5922643d17 Author: Cliff Click <cliffc@acm.org> Date: Sat May 31 14:55:11 2025 -0700 READMEs commit dc1afb8d65a35e90b6495bd6dbaaf8d0d0149569 Author: Cliff Click <cliffc@acm.org> Date: Sat May 31 11:43:09 2025 -0700 Cyclic types! Handle cyclic types: thats that indirectly through a chain of types, point back to themselves. Make all type walkers cycle-aware. New cyclic-aware versions of hash and eq. In addition to hash-consing/interning types, also recycle allocated-but-interned types. Hash-consing has a 99.9% hit rate, so nearly all created types intern, and get recycles. This keeps the total count of types low (by 1000x) which keeps the type UID low, which keeps bit vectors for cyclic type walkers fast. Move TypeStruct._con field into the normal array body field "[]". Rename Field._type to Field._t to avoid shadowing prior _type field. commit fc6f6277e18fcf30f3770698572c307fc0913132 Author: Cliff Click <cliffc@acm.org> Date: Sun May 25 10:06:06 2025 -0700 Progress on cyclic types Types can reset between tests. Rename Phi _declaredType to _minType. Lifts to min type. Broken CFG can have null idom Field offsets by name only, can be delayed even more. Bug dying FunNode looks "inProgress" Move sys.smp to smp dir commit d4544c2740f8effb2edd08293ca19382d4f0aa01 Author: Cliff Click <cliffc@acm.org> Date: Sun May 25 09:57:51 2025 -0700 Move utils to a util directory commit 9462acc2e8b200b499fe4308e3f6a3a6a2d8ac0b Author: Cliff Click <cliffc@acm.org> Date: Wed May 14 14:50:13 2025 -0700 Hitting self-recursive types Changes for allowing locals to be non-const by default. Changes to track `_one` single-ton fields that will get moved to a class. Field offset constants; will become a real int constant once layout is determined, which waits until fields are decided to be in the class or instance; also if the field contents can be put in a smaller size. commit a1f3a27146fa40cb85aef90934250cf5b77be736 Author: Cliff Click <cliffc@acm.org> Date: Sun May 11 16:14:04 2025 -0700 Minor progress bug commit f21ccb089f7963b76cae553ff948b8cc056b0b82 Author: Cliff Click <cliffc@acm.org> Date: Sun May 11 15:28:35 2025 -0700 Ch 23 initial tests commit 89131d2ffa145e6cdbba95abed9abb7989e6822f Author: Cliff Click <cliffc@acm.org> Date: Sun May 11 15:19:02 2025 -0700 First commit ch23
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