From 82b4b2187d51f96f3217b10febfbf18071ec61fc Mon Sep 17 00:00:00 2001 From: Cliff Click Date: Fri, 28 Mar 2025 15:58:58 -0700 Subject: risc5 encoding bug --- .../java/com/seaofnodes/simple/node/cpus/riscv/AUIPC.java | 2 +- .../main/java/com/seaofnodes/simple/node/cpus/riscv/LUI.java | 2 +- .../java/com/seaofnodes/simple/node/cpus/riscv/riscv.java | 11 ++++++++--- 3 files changed, 10 insertions(+), 5 deletions(-) diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AUIPC.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AUIPC.java index 59075190..8563a010 100644 --- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AUIPC.java +++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/AUIPC.java @@ -17,7 +17,7 @@ public class AUIPC extends ConstantNode implements MachNode, RIPRelSize { @Override public void encoding( Encoding enc ) { enc.relo(this); short dst = enc.reg(this); - enc.add4(riscv.u_type(0x17, dst, 0)); + enc.add4(riscv.u_type(riscv.OP_AUIPC, dst, 0)); } // Delta is from opcode start, but X86 measures from the end of the 5-byte encoding diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/LUI.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/LUI.java index 343343e0..75ad6496 100644 --- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/LUI.java +++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/LUI.java @@ -21,7 +21,7 @@ public class LUI extends ConstantNode implements MachNode { long x = ((TypeInteger)_con).value(); int imm20 = (int)(x>>12) & 0xFFFFF; short dst = enc.reg(this); - int lui = riscv.u_type(0x17, dst, imm20); + int lui = riscv.u_type(riscv.OP_LUI, dst, imm20); enc.add4(lui); } diff --git a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/riscv.java b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/riscv.java index 7baef360..1695d8fe 100644 --- a/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/riscv.java +++ b/chapter21/src/main/java/com/seaofnodes/simple/node/cpus/riscv/riscv.java @@ -103,13 +103,18 @@ public class riscv extends Machine { }; // // major opcode: OP - public static int OP = 0b01_100_11; - public static int OP_FP = 0b10_100_11; public static int OP_CUSTOM0 = 0b00_010_11; + public static int OP_AUIPC = 0b00_101_11; + public static int OP_CUSTOM1 = 0b01_010_11; + public static int OP = 0b01_100_11; + public static int OP_LUI = 0b01_101_11; + public static int OP_CUSTOM2 = 0b10_010_11; - public static int OP_RESERVED= 0b11_010_11; + public static int OP_FP = 0b10_100_11; + public static int OP_BRANCH = 0b11_000_11; + public static int OP_RESERVED= 0b11_010_11; //I_type opcode: 0010 0011 public static int I_TYPE = 0x13; -- cgit v1.2.3