From 0caf37adc5f8c1600f13d80aaf77361f407c9694 Mon Sep 17 00:00:00 2001 From: Dibyendu Majumdar Date: Thu, 2 May 2024 22:08:06 +0100 Subject: Documentation updates (#76) * More clearly explain why we do not have an AST in the implementation * Improve the description of type lattice. Cross reference to future chapters. * Minor update * Add lattice visual Revise the text describing meet. * minor update * Add a lattice visual to the text * Update the lattice visual. Add description of the new edges in the SoN graph --- chapter10/README.md | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'chapter10/README.md') diff --git a/chapter10/README.md b/chapter10/README.md index a25ff011..1fb69feb 100644 --- a/chapter10/README.md +++ b/chapter10/README.md @@ -126,6 +126,7 @@ Within the Type Lattice, we now have the following type domains: * Control type - this represents control flow * Integer type - Integer values +* Tuple type - when a Node results in more than one value * Struct type (new) - Represents user defined struct types, a struct type is allowed to have members of Integer type only in this chapter * `$TOP` represents local Top for struct type; all we know about the type is that it is a struct but, we do not know if it is a specific struct, or all possible structs, etc. * `$BOT` represents local Bottom for struct type; we definitely know the value can take all possible struct types. @@ -274,6 +275,12 @@ The graph from above will have the shape: ![Graph1](./docs/example1.svg) +The graph visual has the following enhancements: + +* The memory edges are shown in green and blue. +* The green edges occur on New nodes and anchor the ptr to a control flow node. +* The blue edges show the threading of a memory op via the equivalence aliasing. + ## Additional Peephole Optimizations The equivalence aliasing makes it possible to optimize following scenarios: -- cgit v1.2.3