From 300d2a9c3672acacc8bdd8d5370a424651a00571 Mon Sep 17 00:00:00 2001
From: Cliff Click <cliffc@acm.org>
Date: Sun, 18 Oct 2026 22:09:58 -0700
Subject: Cleanup & backport

The phase rework, made new phases explicit and add them to the CodeGen driver.  Fix the flag-spilling on X86 and ARM.  Fix the GCM conservative anti-deps and backport.
---
 isa/src/test/java/com/seaofnodes/isa/RiscTest.java | 16 ++++++++++++++++
 isa/src/test/java/com/seaofnodes/isa/X86Test.java  |  4 ++++
 2 files changed, 20 insertions(+)

(limited to 'isa/src/test/java')

diff --git a/isa/src/test/java/com/seaofnodes/isa/RiscTest.java b/isa/src/test/java/com/seaofnodes/isa/RiscTest.java
index d10f97a4..5b354036 100644
--- a/isa/src/test/java/com/seaofnodes/isa/RiscTest.java
+++ b/isa/src/test/java/com/seaofnodes/isa/RiscTest.java
@@ -9,6 +9,22 @@ public class RiscTest {
         assert expected==actual : String.format("Expected %08x, got %08x",expected,actual);
     }
     public static void main(String[] args) {
+        word(0xD53B4209,Arm64.flags(9,false)); // MRS x9,NZCV
+        word(0xD51B421A,Arm64.flags(26,true)); // MSR NZCV,x26
+        for( int flags=0; flags<16; flags++ ) {
+            var a=new EvalArm64(new byte[1024],512);
+            a.st4(4,0xD51B4209); // MSR NZCV,x9
+            a.st4(8,0xD53B421A); // MRS x26,NZCV
+            a.st4(12,0xD53B421F); // MRS xzr,NZCV
+            a.st4(16,0xD51B421F); // MSR NZCV,xzr
+            a._pc=4; a.regs[9]=((long)flags<<28) | 0xFFF;
+            assert a.step(3)==0;
+            assert a.regs[26]==(long)flags<<28 && a.regs[31]==512;
+            assert a.N==((flags&8)!=0) && a.Z==((flags&4)!=0);
+            assert a.C==((flags&2)!=0) && a.V==((flags&1)!=0);
+            assert a.step(1)==0;
+            assert !a.N && !a.Z && !a.C && !a.V && a.regs[31]==512;
+        }
         // Instructions encountered by dynamic allocation measurements.
         for( long[] pair : new long[][]{{17,3},{-17,3},{17,0},{Long.MIN_VALUE,-1}} ) {
             var a=new EvalArm64(new byte[1024],512);
diff --git a/isa/src/test/java/com/seaofnodes/isa/X86Test.java b/isa/src/test/java/com/seaofnodes/isa/X86Test.java
index 8af84ae8..4d3f1433 100644
--- a/isa/src/test/java/com/seaofnodes/isa/X86Test.java
+++ b/isa/src/test/java/com/seaofnodes/isa/X86Test.java
@@ -102,6 +102,10 @@ public class X86Test {
         check("41ffd2", b -> X86.callRegister(b,10));
         check("41519d", b -> X86.flags(b,9,true));
         check("9c4159", b -> X86.flags(b,9,false));
+        check("9c8f442418", b -> X86.flagsStack(b,24,false));
+        check("ff7424189d", b -> X86.flagsStack(b,24,true));
+        check("9c8f842480000000", b -> X86.flagsStack(b,128,false));
+        check("ffb424800000009d", b -> X86.flagsStack(b,128,true));
         check("ff7424088f442410", b -> X86.stackCopy(b,8,16));
         check("4d8bca", b -> X86.move(b,false,false,9,10));
         check("4d0f28ca", b -> X86.move(b,true,true,9,10));
-- 
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