From 3975ef0e0cc7a2731ec24e4781d2dc950b659636 Mon Sep 17 00:00:00 2001 From: bigbass1997 Date: Fri, 6 Aug 2021 03:50:07 -0500 Subject: Added name possibility when specifying no memory init is required. Minor formatting change to transition controller swap. --- spec.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/spec.md b/spec.md index 550d0f1..de722fc 100644 --- a/spec.md +++ b/spec.md @@ -75,7 +75,7 @@ Key | Payload Size | Description 000C | variable | URL link to publication, video upload of this TAS, or any other relevant websites 000E | 1 + v + k + n + p bytes | Initialization of named memory space (1 byte type, v = 1 byte length specifier for k, k = length of n, n = name string, p = memory payload) - -> 01 = No intialization required (v+k+n+p = 0) + -> 01 = No intialization required (p = 0) -> 02 = Custom: The 'p' section of payload is used to initialize the 'n' named memory space (e.g. "EEPROM", "WRAM", "Save", etc.) -> 03 = All 0x00 (p = 0) -> 04 = All 0xFF (p = 0) @@ -158,7 +158,7 @@ FE01 | 1 + n bytes | Port number (1-indexed) + a variable number of input ch FE02 | 4 + 1 + n bytes | Defines a transition at a specific point in the TAS. First 4 bytes is the frame/index number based on all inputs contained in all FE01 packets. Then 1 byte specifying the transition type. Followed by a variable number of bytes if applicable. -> 01 = "Soft" Reset (n = 0) -> 02 = Power Reset (n = 0) - -> 03 = Controller Swap ( 1 byte port number + 1 byte new controller type ) + -> 03 = Controller Swap (n = ( 1 byte port number + 1 byte new controller type )) FE03 | 4 + 4 bytes | Specifies a chunk of lag frames based on the original TAS movie. First 4 bytes is the frame number this chunk starts on. Second 4 bytes is the number of sequential lag frames in this chunk. -- cgit v1.2.3